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Diffstat (limited to 'configs/tested-cfgs/SM7_QV100/gpgpusim.config')
-rw-r--r--configs/tested-cfgs/SM7_QV100/gpgpusim.config11
1 files changed, 7 insertions, 4 deletions
diff --git a/configs/tested-cfgs/SM7_QV100/gpgpusim.config b/configs/tested-cfgs/SM7_QV100/gpgpusim.config
index 1a34d0f..5f64908 100644
--- a/configs/tested-cfgs/SM7_QV100/gpgpusim.config
+++ b/configs/tested-cfgs/SM7_QV100/gpgpusim.config
@@ -11,7 +11,7 @@
# functional simulator specification
-gpgpu_ptx_instruction_classification 0
-gpgpu_ptx_sim_mode 0
--gpgpu_ptx_force_max_capability 60
+-gpgpu_ptx_force_max_capability 70
# Device Limits
@@ -21,7 +21,7 @@
-gpgpu_runtime_pending_launch_count_limit 2048
# Compute Capability
--gpgpu_compute_capability_major 6
+-gpgpu_compute_capability_major 7
-gpgpu_compute_capability_minor 0
# SASS execution (only supported with CUDA >= 4.0)
@@ -44,12 +44,13 @@
# shader core pipeline config
-gpgpu_shader_registers 65536
--gpgpu_occupancy_sm_number 60
+-gpgpu_registers_per_block 65536
+-gpgpu_occupancy_sm_number 70
# This implies a maximum of 64 warps/SM
-gpgpu_shader_core_pipeline 2048:32
-gpgpu_shader_cta 32
--gpgpu_simd_model 1
+-gpgpu_simd_model 1
# Pipeline widths and number of FUs
# ID_OC_SP,ID_OC_DP,ID_OC_INT,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_INT,OC_EX_SFU,OC_EX_MEM,EX_WB,ID_OC_TENSOR_CORE,OC_EX_TENSOR_CORE
@@ -91,6 +92,8 @@
-mem_unit_ports 4
-gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32
-gpgpu_shmem_size 98304
+-gpgpu_shmem_sizeDefault 98304
+-gpgpu_shmem_per_block 65536
-gmem_skip_L1D 0
-icnt_flit_size 40
-gpgpu_n_cluster_ejection_buffer_size 32