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Diffstat (limited to 'configs/tested-cfgs/SM7_QV100/gpgpusim.config')
-rw-r--r--configs/tested-cfgs/SM7_QV100/gpgpusim.config13
1 files changed, 7 insertions, 6 deletions
diff --git a/configs/tested-cfgs/SM7_QV100/gpgpusim.config b/configs/tested-cfgs/SM7_QV100/gpgpusim.config
index f70ad55..c0d22ee 100644
--- a/configs/tested-cfgs/SM7_QV100/gpgpusim.config
+++ b/configs/tested-cfgs/SM7_QV100/gpgpusim.config
@@ -87,18 +87,19 @@
# if the assigned shd mem = 0, then L1 cache = 128KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
# disable this mode in case of multi kernels/apps execution
--adaptive_volta_cache_config 1
-# Volta unified cache has four ports
--mem_unit_ports 4
--gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32
+-adaptive_cache_config 1
+# Volta unified cache has four banks
+-l1_banks 4
+#-mem_unit_ports 4
+-gpgpu_cache:dl1 S:1:128:256,L:L:s:N:L,A:256:8,16:0,32
-gpgpu_shmem_size 98304
-gpgpu_shmem_sizeDefault 98304
-gpgpu_shmem_per_block 65536
-gmem_skip_L1D 0
-icnt_flit_size 40
-gpgpu_n_cluster_ejection_buffer_size 32
--l1_latency 80
--smem_latency 19
+-l1_latency 20
+-smem_latency 20
-gpgpu_flush_l1_cache 1
# 32 sets, each 128 bytes 24-way for each memory sub partition (96 KB per memory sub partition). This gives us 6MB L2 cache