diff options
Diffstat (limited to 'src/abstract_hardware_model.cc')
| -rw-r--r-- | src/abstract_hardware_model.cc | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc index fa5bca2..3d3d2f3 100644 --- a/src/abstract_hardware_model.cc +++ b/src/abstract_hardware_model.cc @@ -536,13 +536,30 @@ void warp_inst_t::memory_coalescing_arch( bool is_write, mem_access_type access_ transaction_info &info = subwarp_transactions[block_address]; // can only write to one segment - assert(block_address == line_size_based_tag_func(addr+data_size_coales-1,segment_size)); + //it seems like in trace driven, a thread can write to more than one segment + //assert(block_address == line_size_based_tag_func(addr+data_size_coales-1,segment_size)); info.chunks.set(chunk); info.active.set(thread); unsigned idx = (addr&127); for( unsigned i=0; i < data_size_coales; i++ ) - info.bytes.set(idx+i); + if((idx+i) < MAX_MEMORY_ACCESS_SIZE) + info.bytes.set(idx+i); + + //it seems like in trace driven, a thread can write to more than one segment + //handle this special case + if(block_address != line_size_based_tag_func(addr+data_size_coales-1,segment_size)) { + addr = addr+data_size_coales-1; + unsigned block_address = line_size_based_tag_func(addr,segment_size); + unsigned chunk = (addr&127)/32; + transaction_info &info = subwarp_transactions[block_address]; + info.chunks.set(chunk); + info.active.set(thread); + unsigned idx = (addr&127); + for( unsigned i=0; i < data_size_coales; i++ ) + if((idx+i) < MAX_MEMORY_ACCESS_SIZE) + info.bytes.set(idx+i); + } } } |