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-rw-r--r--src/cuda-sim/cuda_device_runtime.cc2
-rw-r--r--src/cuda-sim/ptx_sim.cc8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cuda-sim/cuda_device_runtime.cc b/src/cuda-sim/cuda_device_runtime.cc
index 917e7a8..86e8147 100644
--- a/src/cuda-sim/cuda_device_runtime.cc
+++ b/src/cuda-sim/cuda_device_runtime.cc
@@ -200,7 +200,7 @@ void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info *
//create child kernel_info_t and index it with parameter_buffer address
gpgpu_t* gpu=thread->get_gpu();
device_grid = new kernel_info_t(config.grid_dim, config.block_dim, device_kernel_entry, gpu->getNameArrayMapping(), gpu->getNameInfoMapping());
- device_grid->launch_cycle = gpu_sim_cycle + gpu_tot_sim_cycle;
+ device_grid->launch_cycle = gpu->gpu_sim_cycle + gpu->gpu_tot_sim_cycle;
kernel_info_t & parent_grid = thread->get_kernel();
DEV_RUNTIME_REPORT("child kernel launched by " << parent_grid.name() << ", cta (" <<
thread->get_ctaid().x << ", " << thread->get_ctaid().y << ", " << thread->get_ctaid().z <<
diff --git a/src/cuda-sim/ptx_sim.cc b/src/cuda-sim/ptx_sim.cc
index 820287d..8ad651e 100644
--- a/src/cuda-sim/ptx_sim.cc
+++ b/src/cuda-sim/ptx_sim.cc
@@ -222,7 +222,7 @@ void ptx_thread_info::set_done()
{
assert( !m_at_barrier );
m_thread_done = true;
- m_cycle_done = gpu_sim_cycle;
+ m_cycle_done = m_gpu->gpu_sim_cycle;
}
unsigned ptx_thread_info::get_builtin( int builtin_id, unsigned dim_mod )
@@ -230,15 +230,15 @@ unsigned ptx_thread_info::get_builtin( int builtin_id, unsigned dim_mod )
assert( m_valid );
switch ((builtin_id&0xFFFF)) {
case CLOCK_REG:
- return (unsigned)(gpu_sim_cycle + gpu_tot_sim_cycle);
+ return (unsigned)(m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle);
case CLOCK64_REG:
abort(); // change return value to unsigned long long?
// GPGPUSim clock is 4 times slower - multiply by 4
- return (gpu_sim_cycle + gpu_tot_sim_cycle)*4;
+ return (m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle)*4;
case HALFCLOCK_ID:
// GPGPUSim clock is 4 times slower - multiply by 4
// Hardware clock counter is incremented at half the shader clock frequency - divide by 2 (Henry '10)
- return (gpu_sim_cycle + gpu_tot_sim_cycle)*2;
+ return (m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle)*2;
case CTAID_REG:
assert( dim_mod < 3 );
if( dim_mod == 0 ) return m_ctaid.x;