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-rw-r--r--src/cuda-sim/instructions.cc2
-rw-r--r--src/cuda-sim/opcodes.h26
-rw-r--r--src/cuda-sim/ptx.l44
-rw-r--r--src/cuda-sim/ptx_sim.cc40
4 files changed, 86 insertions, 26 deletions
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index f3aa24a..5decd2b 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -2977,7 +2977,7 @@ void xor_impl( const ptx_instruction *pI, ptx_thread_info *thread )
void inst_not_implemented( const ptx_instruction * pI )
{
- printf("Execution error (%s:%u): instruction \"%s\" not (yet) implemented\n",
+ printf("GPGPU-Sim PTX: ERROR (%s:%u) instruction \"%s\" not (yet) implemented\n",
pI->source_file(),
pI->source_line(),
pI->get_opcode_cstr() );
diff --git a/src/cuda-sim/opcodes.h b/src/cuda-sim/opcodes.h
index 221bf2e..1a06415 100644
--- a/src/cuda-sim/opcodes.h
+++ b/src/cuda-sim/opcodes.h
@@ -71,12 +71,26 @@ enum opcode_t {
};
enum special_regs {
- CLOCK_ID,
- CTA_ID,
- NTID_ID,
- GRIDID_ID,
- NCTAID_ID,
- TID_ID
+ CLOCK_REG,
+ CLOCK64_REG,
+ CTAID_REG,
+ ENVREG_REG,
+ GRIDID_REG,
+ LANEID_REG,
+ LANEMASK_EQ_REG,
+ LANEMASK_LE_REG,
+ LANEMASK_LT_REG,
+ LANEMASK_GE_REG,
+ LANEMASK_GT_REG,
+ NCTAID_REG,
+ NTID_REG,
+ NSMID_REG,
+ NWARPID_REG,
+ PM_REG,
+ SMID_REG,
+ TID_REG,
+ WARPID_REG,
+ WARPSZ_REG
};
#endif
diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l
index e4c9fef..b7dd56f 100644
--- a/src/cuda-sim/ptx.l
+++ b/src/cuda-sim/ptx.l
@@ -71,6 +71,11 @@
char linebuf[1024];
unsigned col = 0;
#define TC col+=strlen(ptx_text);
+#define CHECK_UNSIGNED \
+ if( yytext[strlen(yytext)-1]=='U' ) { \
+ printf("GPGPU-Sim: ERROR ** U modifier not implemented\n"); \
+ abort(); \
+ }
int ptx_error( const char *s );
%}
@@ -165,7 +170,7 @@ xor TC; ptx_lval.int_value = XOR_OP; return OPCODE;
\.byte TC; return BYTE_DIRECTIVE; /* not in PTX 2.1 */
\.callprototype TC; return CALLPROTOTYPE_DIRECTIVE;
\.calltargets TC; return CALLTARGETS_DIRECTIVE;
-\.const\[[0-9]+\] TC; return CONST_DIRECTIVE;
+\.const\[[0-9]+\] TC; /*fixme: should use const offset value*/ abort(); return CONST_DIRECTIVE;
\.const TC; return CONST_DIRECTIVE;
\.entry TC; return ENTRY_DIRECTIVE;
\.extern TC; return EXTERN_DIRECTIVE;
@@ -194,18 +199,37 @@ xor TC; ptx_lval.int_value = XOR_OP; return OPCODE;
\.visible TC; return VISIBLE_DIRECTIVE;
-"%clock" TC; ptx_lval.int_value = CLOCK_ID; return SPECIAL_REGISTER;
-"%ctaid" TC; ptx_lval.int_value = CTA_ID; return SPECIAL_REGISTER;
-"%ntid" TC; ptx_lval.int_value = NTID_ID; return SPECIAL_REGISTER;
-"%gridid" TC; ptx_lval.int_value = GRIDID_ID; return SPECIAL_REGISTER;
-"%nctaid" TC; ptx_lval.int_value = NCTAID_ID; return SPECIAL_REGISTER;
-"%tid" TC; ptx_lval.int_value = TID_ID; return SPECIAL_REGISTER;
+"%clock" TC; ptx_lval.int_value = CLOCK_REG; return SPECIAL_REGISTER;
+"%clock64" TC; ptx_lval.int_value = CLOCK64_REG; return SPECIAL_REGISTER;
+"%ctaid" TC; ptx_lval.int_value = CTAID_REG; return SPECIAL_REGISTER;
+"%envreg"[0-9]+ TC; sscanf(yytext+7,"%u",&ptx_lval.int_value); ptx_lval.int_value<<=16; ptx_lval.int_value += ENVREG_REG; return SPECIAL_REGISTER;
+"%gridid" TC; ptx_lval.int_value = GRIDID_REG; return SPECIAL_REGISTER;
+"%laneid" TC; ptx_lval.int_value = LANEID_REG; return SPECIAL_REGISTER;
+"%lanemask_eq" TC; ptx_lval.int_value = LANEMASK_EQ_REG; return SPECIAL_REGISTER;
+"%lanemask_le" TC; ptx_lval.int_value = LANEMASK_LE_REG; return SPECIAL_REGISTER;
+"%lanemask_lt" TC; ptx_lval.int_value = LANEMASK_LT_REG; return SPECIAL_REGISTER;
+"%lanemask_ge" TC; ptx_lval.int_value = LANEMASK_GE_REG; return SPECIAL_REGISTER;
+"%lanemask_gt" TC; ptx_lval.int_value = LANEMASK_GT_REG; return SPECIAL_REGISTER;
+"%nctaid" TC; ptx_lval.int_value = NCTAID_REG; return SPECIAL_REGISTER;
+"%ntid" TC; ptx_lval.int_value = NTID_REG; return SPECIAL_REGISTER;
+"%nsmid" TC; ptx_lval.int_value = NSMID_REG; return SPECIAL_REGISTER;
+"%nwarpid" TC; ptx_lval.int_value = NWARPID_REG; return SPECIAL_REGISTER;
+"%pm"[0-3] TC; sscanf(yytext+3,"%u",&ptx_lval.int_value); ptx_lval.int_value<<=16; ptx_lval.int_value += PM_REG; return SPECIAL_REGISTER;
+"%smid" TC; ptx_lval.int_value = SMID_REG; return SPECIAL_REGISTER;
+"%tid" TC; ptx_lval.int_value = TID_REG; return SPECIAL_REGISTER;
+"%warpid" TC; ptx_lval.int_value = WARPID_REG; return SPECIAL_REGISTER;
+"WARP_SZ" TC; ptx_lval.int_value = WARPSZ_REG; return SPECIAL_REGISTER;
-[_A-Za-z$%][_0-9A-Za-z$]* TC; ptx_lval.string_value = strdup(yytext); /*printf("\n<<identifier=\"%s\">>\n", yytext); fflush(stdout);*/ return IDENTIFIER;
+[a-zA-Z][a-zA-Z0-9_$]* TC; ptx_lval.string_value = strdup(yytext); return IDENTIFIER;
+[_$%][a-zA-Z0-9_$]+ TC; ptx_lval.string_value = strdup(yytext); return IDENTIFIER;
[0-9]+\.[0-9]+ TC; sscanf(yytext,"%lf", &ptx_lval.double_value); return DOUBLE_OPERAND;
-[-]{0,1}[0-9]+ TC; ptx_lval.int_value = atoi(yytext); return INT_OPERAND;
-0[xX][0-9]+ TC; sscanf(yytext,"%x", &ptx_lval.int_value); return INT_OPERAND;
+
+0[xX][0-9]+U? TC; CHECK_UNSIGNED; sscanf(yytext,"%x", &ptx_lval.int_value); return INT_OPERAND;
+0[0-7]+U? TC; printf("GPGPU-Sim: ERROR ** parsing octal not (yet) implemented\n"); abort(); return INT_OPERAND;
+0[bB][01]+U? TC; printf("GPGPU-Sim: ERROR ** parsing binary not (yet) implemented\n"); abort(); return INT_OPERAND;
+[-]?[0-9]+U? TC; CHECK_UNSIGNED; ptx_lval.int_value = atoi(yytext); return INT_OPERAND;
+
0[fF][0-9a-fA-F]{8} TC; sscanf(yytext+2,"%x", (unsigned*)(void*)&ptx_lval.float_value); return FLOAT_OPERAND;
0[dD][0-9a-fA-F]{16} TC; sscanf(yytext+2,"%Lx", (unsigned long long*)(void*)&ptx_lval.double_value); return DOUBLE_OPERAND;
diff --git a/src/cuda-sim/ptx_sim.cc b/src/cuda-sim/ptx_sim.cc
index 8ec60df..a1a77fd 100644
--- a/src/cuda-sim/ptx_sim.cc
+++ b/src/cuda-sim/ptx_sim.cc
@@ -65,6 +65,8 @@
#include <string>
#include "ptx_ir.h"
+void feature_not_implemented( const char *f );
+
std::set<unsigned long long> g_ptx_cta_info_sm_idx_used;
unsigned long long g_ptx_cta_info_uid = 1;
extern int gpgpu_option_spread_blocks_across_cores;
@@ -256,23 +258,37 @@ extern signed long long gpu_tot_sim_cycle;
unsigned ptx_thread_info::get_builtin( int builtin_id, unsigned dim_mod )
{
assert( m_valid );
- switch (builtin_id) {
- case NTID_ID:
- assert( dim_mod < 3 );
- return m_ntid[dim_mod];
- case CLOCK_ID:
+ switch ((builtin_id&0xFFFF)) {
+ case CLOCK_REG:
+ return (unsigned)(gpu_sim_cycle + gpu_tot_sim_cycle);
+ case CLOCK64_REG:
+ abort(); // change return value to unsigned long long?
return gpu_sim_cycle + gpu_tot_sim_cycle;
- case CTA_ID:
+ case CTAID_REG:
assert( dim_mod < 3 );
return m_ctaid[dim_mod];
- case GRIDID_ID:
+ case ENVREG_REG: feature_not_implemented( "%envreg" ); return 0;
+ case GRIDID_REG:
return m_gridid;
- case NCTAID_ID:
+ case LANEID_REG: feature_not_implemented( "%laneid" ); return 0;
+ case LANEMASK_EQ_REG: feature_not_implemented( "%lanemask_eq" ); return 0;
+ case LANEMASK_LE_REG: feature_not_implemented( "%lanemask_le" ); return 0;
+ case LANEMASK_LT_REG: feature_not_implemented( "%lanemask_lt" ); return 0;
+ case LANEMASK_GE_REG: feature_not_implemented( "%lanemask_ge" ); return 0;
+ case LANEMASK_GT_REG: feature_not_implemented( "%lanemask_gt" ); return 0;
+ case NCTAID_REG:
assert( dim_mod < 3 );
return m_nctaid[dim_mod];
- case TID_ID:
+ case NTID_REG:
+ assert( dim_mod < 3 );
+ return m_ntid[dim_mod];
+ case NWARPID_REG: feature_not_implemented( "%nwarpid" ); return 0;
+ case PM_REG: feature_not_implemented( "%pm" ); return 0;
+ case SMID_REG: feature_not_implemented( "%smid" ); return 0;
+ case TID_REG:
assert( dim_mod < 3 );
return m_tid[dim_mod];
+ case WARPSZ_REG: feature_not_implemented( "WARP_SZ" ); return 0;
default:
assert(0);
}
@@ -430,3 +446,9 @@ void ptx_thread_info::set_npc( const function_info *f )
m_func_info = const_cast<function_info*>( f );
m_symbol_table = m_func_info->get_symtab();
}
+
+void feature_not_implemented( const char *f )
+{
+ printf("GPGPU-Sim: feature '%s' not supported\n", f );
+ abort();
+}
generated by cgit v1.3 (git 2.53.0) at 2026-07-11 08:23:47 +0000