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-rw-r--r--src/cuda-sim/cuda-sim.cc203
-rw-r--r--src/cuda-sim/instructions.cc33
-rw-r--r--src/cuda-sim/ptx.l65
-rw-r--r--src/cuda-sim/ptx_ir.cc25
4 files changed, 203 insertions, 123 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 71f0703..f9e5db3 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -1,19 +1,20 @@
-// Copyright (c) 2009-2011, Tor M. Aamodt, Ali Bakhoda, Wilson W.L. Fung,
-// George L. Yuan, Jimmy Kwa
-// The University of British Columbia
+// Copyright (c) 2009-2021, Tor M. Aamodt, Ali Bakhoda, Wilson W.L. Fung,
+// George L. Yuan, Jimmy Kwa, Vijay Kandiah, Nikos Hardavellas
+// The University of British Columbia, Northwestern University
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
-// Redistributions of source code must retain the above copyright notice, this
-// list of conditions and the following disclaimer.
-// Redistributions in binary form must reproduce the above copyright notice,
-// this list of conditions and the following disclaimer in the documentation
-// and/or other materials provided with the distribution. Neither the name of
-// The University of British Columbia nor the names of its contributors may be
-// used to endorse or promote products derived from this software without
-// specific prior written permission.
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer;
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution;
+// 3. Neither the names of The University of British Columbia, Northwestern
+// University nor the names of their contributors may be used to
+// endorse or promote products derived from this software without specific
+// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -588,65 +589,119 @@ void ptx_instruction::set_fp_or_int_archop() {
oprnd_type = INT_OP;
}
}
-void ptx_instruction::set_mul_div_or_other_archop() {
- sp_op = OTHER_OP;
- if ((m_opcode != MEMBAR_OP) && (m_opcode != SSY_OP) && (m_opcode != BRA_OP) &&
- (m_opcode != BAR_OP) && (m_opcode != EXIT_OP) && (m_opcode != NOP_OP) &&
- (m_opcode != RETP_OP) && (m_opcode != RET_OP) && (m_opcode != CALLP_OP) &&
- (m_opcode != CALL_OP)) {
- if (get_type() == F32_TYPE || get_type() == F64_TYPE ||
- get_type() == FF64_TYPE) {
- switch (get_opcode()) {
- case MUL_OP:
- case MAD_OP:
- sp_op = FP_MUL_OP;
- break;
- case DIV_OP:
- sp_op = FP_DIV_OP;
- break;
- case LG2_OP:
- sp_op = FP_LG_OP;
- break;
- case RSQRT_OP:
- case SQRT_OP:
- sp_op = FP_SQRT_OP;
- break;
- case RCP_OP:
- sp_op = FP_DIV_OP;
- break;
- case SIN_OP:
- case COS_OP:
- sp_op = FP_SIN_OP;
- break;
- case EX2_OP:
- sp_op = FP_EXP_OP;
- break;
- default:
- if ((op == ALU_OP) || (op == TENSOR_CORE_OP)) sp_op = FP__OP;
- break;
+
+void ptx_instruction::set_mul_div_or_other_archop(){
+ sp_op=OTHER_OP;
+ if((m_opcode != MEMBAR_OP) && (m_opcode != SSY_OP) && (m_opcode != BRA_OP) && (m_opcode != BAR_OP) && (m_opcode != EXIT_OP) && (m_opcode != NOP_OP) && (m_opcode != RETP_OP) && (m_opcode != RET_OP) && (m_opcode != CALLP_OP) && (m_opcode != CALL_OP)){
+ if(get_type() == F64_TYPE || get_type() == FF64_TYPE){
+ switch(get_opcode()){
+ case MUL_OP:
+ case MAD_OP:
+ case FMA_OP:
+ sp_op=DP_MUL_OP;
+ break;
+ case DIV_OP:
+ case REM_OP:
+ sp_op=DP_DIV_OP;
+ break;
+ case RCP_OP:
+ sp_op=DP_DIV_OP;
+ break;
+ case LG2_OP:
+ sp_op=FP_LG_OP;
+ break;
+ case RSQRT_OP:
+ case SQRT_OP:
+ sp_op=FP_SQRT_OP;
+ break;
+ case SIN_OP:
+ case COS_OP:
+ sp_op=FP_SIN_OP;
+ break;
+ case EX2_OP:
+ sp_op=FP_EXP_OP;
+ break;
+ case MMA_OP:
+ sp_op=TENSOR__OP;
+ break;
+ case TEX_OP:
+ sp_op=TEX__OP;
+ break;
+ default:
+ if((op==DP_OP) || (op==ALU_OP))
+ sp_op=DP___OP;
+ break;
+ }
}
- } else {
- switch (get_opcode()) {
- case MUL24_OP:
- case MAD24_OP:
- sp_op = INT_MUL24_OP;
- break;
- case MUL_OP:
- case MAD_OP:
- if (get_type() == U32_TYPE || get_type() == S32_TYPE ||
- get_type() == B32_TYPE)
- sp_op = INT_MUL32_OP;
- else
- sp_op = INT_MUL_OP;
- break;
- case DIV_OP:
- sp_op = INT_DIV_OP;
- break;
- default:
- if ((op == ALU_OP)) sp_op = INT__OP;
- break;
+ else if(get_type()==F16_TYPE || get_type()==F32_TYPE){
+ switch(get_opcode()){
+ case MUL_OP:
+ case MAD_OP:
+ case FMA_OP:
+ sp_op=FP_MUL_OP;
+ break;
+ case DIV_OP:
+ case REM_OP:
+ sp_op=FP_DIV_OP;
+ break;
+ case RCP_OP:
+ sp_op=FP_DIV_OP;
+ break;
+ case LG2_OP:
+ sp_op=FP_LG_OP;
+ break;
+ case RSQRT_OP:
+ case SQRT_OP:
+ sp_op=FP_SQRT_OP;
+ break;
+ case SIN_OP:
+ case COS_OP:
+ sp_op=FP_SIN_OP;
+ break;
+ case EX2_OP:
+ sp_op=FP_EXP_OP;
+ break;
+ case MMA_OP:
+ sp_op=TENSOR__OP;
+ break;
+ case TEX_OP:
+ sp_op=TEX__OP;
+ break;
+ default:
+ if((op==SP_OP) || (op==ALU_OP))
+ sp_op=FP__OP;
+ break;
+ }
+ }else {
+ switch(get_opcode()){
+ case MUL24_OP:
+ case MAD24_OP:
+ sp_op=INT_MUL24_OP;
+ break;
+ case MUL_OP:
+ case MAD_OP:
+ case FMA_OP:
+ if(get_type()==U32_TYPE || get_type()==S32_TYPE || get_type()==B32_TYPE)
+ sp_op=INT_MUL32_OP;
+ else
+ sp_op=INT_MUL_OP;
+ break;
+ case DIV_OP:
+ case REM_OP:
+ sp_op=INT_DIV_OP;
+ break;
+ case MMA_OP:
+ sp_op=TENSOR__OP;
+ break;
+ case TEX_OP:
+ sp_op=TEX__OP;
+ break;
+ default:
+ if((op==INTP_OP) || (op==ALU_OP))
+ sp_op=INT__OP;
+ break;
+ }
}
- }
}
}
@@ -880,6 +935,7 @@ void ptx_instruction::set_opcode_and_latency() {
case MAD_OP:
case MADC_OP:
case MADP_OP:
+ case FMA_OP:
// MAD latency
switch (get_type()) {
case F32_TYPE:
@@ -903,7 +959,18 @@ void ptx_instruction::set_opcode_and_latency() {
break;
}
break;
+ case MUL24_OP: //MUL24 is performed on mul32 units (with additional instructions for bitmasking) on devices with compute capability >1.x
+ latency = int_latency[2]+1;
+ initiation_interval = int_init[2]+1;
+ op = INTP_OP;
+ break;
+ case MAD24_OP:
+ latency = int_latency[3]+1;
+ initiation_interval = int_init[3]+1;
+ op = INTP_OP;
+ break;
case DIV_OP:
+ case REM_OP:
// Floating point only
op = SFU_OP;
switch (get_type()) {
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 0b990e8..44afbe5 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -1,19 +1,20 @@
-// Copyright (c) 2009-2011, Tor M. Aamodt, Wilson W.L. Fung, Ali Bakhoda,
-// Jimmy Kwa, George L. Yuan
-// The University of British Columbia
+// Copyright (c) 2009-2021, Tor M. Aamodt, Wilson W.L. Fung, Ali Bakhoda,
+// Jimmy Kwa, George L. Yuan, Vijay Kandiah, Nikos Hardavellas
+// The University of British Columbia, Northwestern University
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
-// Redistributions of source code must retain the above copyright notice, this
-// list of conditions and the following disclaimer.
-// Redistributions in binary form must reproduce the above copyright notice,
-// this list of conditions and the following disclaimer in the documentation
-// and/or other materials provided with the distribution. Neither the name of
-// The University of British Columbia nor the names of its contributors may be
-// used to endorse or promote products derived from this software without
-// specific prior written permission.
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer;
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution;
+// 3. Neither the names of The University of British Columbia, Northwestern
+// University nor the names of their contributors may be used to
+// endorse or promote products derived from this software without specific
+// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -26,6 +27,7 @@
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
+
#include "instructions.h"
#include "half.h"
#include "half.hpp"
@@ -3977,7 +3979,7 @@ void mad_def(const ptx_instruction *pI, ptx_thread_info *thread,
fesetround(FE_TOWARDZERO);
break;
default:
- assert(0);
+ //assert(0);
break;
}
d.f32 = a.f32 * b.f32 + c.f32;
@@ -4323,11 +4325,8 @@ void mul_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
case S64_TYPE:
t.s64 = a.s64 * b.s64;
assert(!pI->is_wide());
- assert(!pI->is_hi());
- if (pI->is_lo())
- d.s64 = t.s64;
- else
- assert(0);
+ //assert(!pI->is_hi());
+ d.s64 = t.s64;
break;
case U16_TYPE:
t.u32 = ((unsigned)a.u16) * ((unsigned)b.u16);
diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l
index 6754045..7706f0b 100644
--- a/src/cuda-sim/ptx.l
+++ b/src/cuda-sim/ptx.l
@@ -1,32 +1,34 @@
/*
-Copyright (c) 2009-2011, Tor M. Aamodt
-The University of British Columbia
+Copyright (c) 2009-2021, Tor M. Aamodt, Vijay Kandiah, Nikos Hardavellas
+The University of British Columbia, Northwestern University
All rights reserved.
-
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-Redistributions of source code must retain the above copyright notice, this
-list of conditions and the following disclaimer.
-Redistributions in binary form must reproduce the above copyright notice, this
-list of conditions and the following disclaimer in the documentation and/or
-other materials provided with the distribution.
-Neither the name of The University of British Columbia nor the names of its
-contributors may be used to endorse or promote products derived from this
-software without specific prior written permission.
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer;
+2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution;
+3. Neither the names of The University of British Columbia, Northwestern
+ University nor the names of their contributors may be used to
+ endorse or promote products derived from this software without specific
+ prior written permission.
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
+
%option nounput
%option noyywrap
%option yylineno
@@ -69,6 +71,7 @@ andn TC; yylval->int_value = ANDN_OP; return OPCODE;
atom TC; yylval->int_value = ATOM_OP; return OPCODE;
bar.warp TC; yylval->int_value = NOP_OP; return OPCODE;
bar TC; yylval->int_value = BAR_OP; return OPCODE;
+barrier TC; yylval->int_value = BAR_OP; return OPCODE;
bfe TC; yylval->int_value = BFE_OP; return OPCODE;
bfi TC; yylval->int_value = BFI_OP; return OPCODE;
bfind TC; yylval->int_value = BFIND_OP; return OPCODE;
@@ -167,14 +170,22 @@ breakaddr TC; yylval->int_value = BREAKADDR_OP; return OPCODE;
"CPTX_END" printf("ENDING CUSTOM PTX.\n"); BEGIN(IN_COMMENT);
<INITIAL,NOT_OPCODE,IN_INST,IN_FUNC_DECL>{
-\.a\.sync TC; yylval->int_value = LOAD_A; return WMMA_DIRECTIVE;
-\.b\.sync TC; yylval->int_value = LOAD_B; return WMMA_DIRECTIVE;
-\.c\.sync TC; yylval->int_value = LOAD_C; return WMMA_DIRECTIVE;
-\.d\.sync TC; yylval->int_value = STORE_D; return WMMA_DIRECTIVE;
-\.mma\.sync TC;yylval->int_value=MMA; return WMMA_DIRECTIVE;
+\.a\.sync\.aligned TC; yylval->int_value = LOAD_A; return WMMA_DIRECTIVE;
+\.b\.sync\.aligned TC; yylval->int_value = LOAD_B; return WMMA_DIRECTIVE;
+\.c\.sync\.aligned TC; yylval->int_value = LOAD_C; return WMMA_DIRECTIVE;
+\.d\.sync\.aligned TC; yylval->int_value = STORE_D; return WMMA_DIRECTIVE;
+\.mma\.sync\.aligned TC;yylval->int_value=MMA; return WMMA_DIRECTIVE;
\.row TC; yylval->int_value = ROW; return LAYOUT;
\.col TC; yylval->int_value = COL; return LAYOUT;
+\.m16n16k16\.global TC; yylval->int_value = M16N16K16; return CONFIGURATION;
+\.m32n8k16\.global TC; yylval->int_value = M32N8K16; return CONFIGURATION;
+\.m8n32k16\.global TC; yylval->int_value = M8N32K16; return CONFIGURATION;
+
+\.m16n16k16\.shared TC; yylval->int_value = M16N16K16; return CONFIGURATION;
+\.m32n8k16\.shared TC; yylval->int_value = M32N8K16; return CONFIGURATION;
+\.m8n32k16\.shared TC; yylval->int_value = M8N32K16; return CONFIGURATION;
+
\.m16n16k16 TC; yylval->int_value = M16N16K16; return CONFIGURATION;
\.m32n8k16 TC; yylval->int_value = M32N8K16; return CONFIGURATION;
\.m8n32k16 TC; yylval->int_value = M8N32K16; return CONFIGURATION;
@@ -476,4 +487,4 @@ int ptx_error( yyscan_t yyscanner, ptx_recognizer* recognizer, const char *s )
fflush(stdout);
//exit(1);
return 0;
-}
+} \ No newline at end of file
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index d3da4b5..2edc1ed 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -1,19 +1,20 @@
-// Copyright (c) 2009-2011, Tor M. Aamodt, Ali Bakhoda, Wilson W.L. Fung,
-// George L. Yuan
-// The University of British Columbia
+// Copyright (c) 2009-2021, Tor M. Aamodt, Ali Bakhoda, Wilson W.L. Fung,
+// George L. Yuan, Vijay Kandiah, Nikos Hardavellas
+// The University of British Columbia, Northwestern University
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
-// Redistributions of source code must retain the above copyright notice, this
-// list of conditions and the following disclaimer.
-// Redistributions in binary form must reproduce the above copyright notice,
-// this list of conditions and the following disclaimer in the documentation
-// and/or other materials provided with the distribution. Neither the name of
-// The University of British Columbia nor the names of its contributors may be
-// used to endorse or promote products derived from this software without
-// specific prior written permission.
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer;
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution;
+// 3. Neither the names of The University of British Columbia, Northwestern
+// University nor the names of their contributors may be used to
+// endorse or promote products derived from this software without specific
+// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -1384,6 +1385,8 @@ ptx_instruction::ptx_instruction(
case CS_OPTION:
case LU_OPTION:
case CV_OPTION:
+ case WB_OPTION:
+ case WT_OPTION:
m_cache_option = last_ptx_inst_option;
break;
case HALF_OPTION:
generated by cgit v1.3 (git 2.53.0) at 2026-07-10 23:27:29 +0000