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-rw-r--r--src/cuda-sim/cuda-sim.cc27
-rw-r--r--src/cuda-sim/cuda-sim.h13
-rw-r--r--src/cuda-sim/cuda_device_runtime.cc45
-rw-r--r--src/cuda-sim/cuda_device_runtime.h59
-rw-r--r--src/cuda-sim/instructions.cc72
-rw-r--r--src/cuda-sim/memory.cc3
-rw-r--r--src/cuda-sim/ptx-stats.cc37
-rw-r--r--src/cuda-sim/ptx-stats.h38
-rw-r--r--src/cuda-sim/ptx_ir.cc39
-rw-r--r--src/cuda-sim/ptx_ir.h73
-rw-r--r--src/cuda-sim/ptx_loader.cc15
-rw-r--r--src/cuda-sim/ptx_loader.h4
-rw-r--r--src/cuda-sim/ptx_parser.cc35
-rw-r--r--src/cuda-sim/ptx_parser.h10
-rw-r--r--src/cuda-sim/ptx_sim.cc26
-rw-r--r--src/cuda-sim/ptx_sim.h4
16 files changed, 251 insertions, 249 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 7ff869c..b9e6552 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -54,7 +54,6 @@ typedef void * yyscan_t;
#include "../../libcuda/gpgpu_context.h"
int g_debug_execution = 0;
-addr_t g_debug_pc = 0xBEEF1518;
// Output debug information to file options
@@ -216,8 +215,6 @@ void gpgpu_t::gpgpu_ptx_sim_unbindTexture(const struct textureReference* texref)
m_NameToTextureInfo.erase(texname);
}
-std::vector<ptx_instruction*> function_info::s_g_pc_to_insn;
-
#define MAX_INST_SIZE 8 /*bytes*/
void function_info::ptx_assemble()
@@ -238,14 +235,14 @@ void function_info::ptx_assemble()
addr_t PC = gpgpu_ctx->func_sim->g_assemble_code_next_pc; // globally unique address (across functions)
// start function on an aligned address
for( unsigned i=0; i < (PC%MAX_INST_SIZE); i++ )
- s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
+ gpgpu_ctx->s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
PC += PC%MAX_INST_SIZE;
m_start_PC = PC;
addr_t n=0; // offset in m_instr_mem
//Why s_g_pc_to_insn.size() is needed to reserve additional memory for insts? reserve is cumulative.
//s_g_pc_to_insn.reserve(s_g_pc_to_insn.size() + MAX_INST_SIZE*m_instructions.size());
- s_g_pc_to_insn.reserve(MAX_INST_SIZE*m_instructions.size());
+ gpgpu_ctx->s_g_pc_to_insn.reserve(MAX_INST_SIZE*m_instructions.size());
for ( i=m_instructions.begin(); i != m_instructions.end(); i++ ) {
ptx_instruction *pI = *i;
if ( pI->is_label() ) {
@@ -254,13 +251,13 @@ void function_info::ptx_assemble()
} else {
gpgpu_ctx->func_sim->g_pc_to_finfo[PC] = this;
m_instr_mem[n] = pI;
- s_g_pc_to_insn.push_back(pI);
- assert(pI == s_g_pc_to_insn[PC]);
+ gpgpu_ctx->s_g_pc_to_insn.push_back(pI);
+ assert(pI == gpgpu_ctx->s_g_pc_to_insn[PC]);
pI->set_m_instr_mem_index(n);
pI->set_PC(PC);
assert( pI->inst_size() <= MAX_INST_SIZE );
for( unsigned i=1; i < pI->inst_size(); i++ ) {
- s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
+ gpgpu_ctx->s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
m_instr_mem[n+i]=NULL;
}
n += pI->inst_size();
@@ -1739,9 +1736,9 @@ const struct gpgpu_ptx_sim_info* ptx_sim_kernel_info(const function_info *kernel
return kernel->get_kernel_info();
}
-const warp_inst_t *ptx_fetch_inst( address_type pc )
+const warp_inst_t *gpgpu_context::ptx_fetch_inst( address_type pc )
{
- return function_info::pc_to_instruction(pc);
+ return pc_to_instruction(pc);
}
unsigned ptx_sim_init_thread( kernel_info_t &kernel,
@@ -1825,7 +1822,7 @@ unsigned ptx_sim_init_thread( kernel_info_t &kernel,
snprintf(buf,512,"sstarr_%u", sid);
sstarr_mem = new memory_space_impl<16*1024>(buf,4);
sstarr_memory_lookup[sm_idx] = sstarr_mem;
- cta_info = new ptx_cta_info(sm_idx);
+ cta_info = new ptx_cta_info(sm_idx, gpu->gpgpu_ctx);
ptx_cta_lookup[sm_idx] = cta_info;
} else {
if ( g_debug_execution >= 1 ) {
@@ -1995,8 +1992,8 @@ void cuda_sim::gpgpu_ptx_sim_memcpy_symbol(const char *hostVar, const void *src,
const char *mem_name = NULL;
memory_space *mem = NULL;
- std::map<std::string,symbol_table*>::iterator st = g_sym_name_to_symbol_table.find(sym_name.c_str());
- assert( st != g_sym_name_to_symbol_table.end() );
+ std::map<std::string,symbol_table*>::iterator st = gpgpu_ctx->ptx_parser->g_sym_name_to_symbol_table.find(sym_name.c_str());
+ assert( st != gpgpu_ctx->ptx_parser->g_sym_name_to_symbol_table.end() );
symbol_table *symtab = st->second;
symbol *sym = symtab->lookup(sym_name.c_str());
@@ -2367,11 +2364,11 @@ void functionalCoreSim::executeWarp(unsigned i, bool &allAtBarrier, bool & someO
if(!m_warpAtBarrier[i]&& m_liveThreadCount[i]>0) allAtBarrier = false;
}
-unsigned translate_pc_to_ptxlineno(unsigned pc)
+unsigned gpgpu_context::translate_pc_to_ptxlineno(unsigned pc)
{
// this function assumes that the kernel fits inside a single PTX file
// function_info *pFunc = g_func_info; // assume that the current kernel is the one in query
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = pc_to_instruction(pc);
unsigned ptx_line_number = pInsn->source_line();
return ptx_line_number;
diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h
index e4d34fe..1be3d19 100644
--- a/src/cuda-sim/cuda-sim.h
+++ b/src/cuda-sim/cuda-sim.h
@@ -58,10 +58,8 @@ unsigned ptx_sim_init_thread( kernel_info_t &kernel,
unsigned hw_warp_id,
gpgpu_t *gpu,
bool functionalSimulationMode = false);
-const warp_inst_t *ptx_fetch_inst( address_type pc );
const struct gpgpu_ptx_sim_info* ptx_sim_kernel_info(const class function_info *kernel);
-
/*!
* This class functionally executes a kernel. It uses the basic data structures and procedures in core_t
*/
@@ -132,6 +130,11 @@ class cuda_sim {
g_inst_op_classification_stat= NULL;
g_assemble_code_next_pc=0;
g_debug_thread_uid = 0;
+ g_override_embedded_ptx = false;
+ ptx_tex_regs = NULL;
+ g_ptx_thread_info_delete_count=0;
+ g_ptx_thread_info_uid_next=1;
+ g_debug_pc = 0xBEEF1518;
gpgpu_ctx = ctx;
}
//global variables
@@ -166,6 +169,12 @@ class cuda_sim {
unsigned cdp_latency[5];
unsigned g_assemble_code_next_pc;
int g_debug_thread_uid;
+ bool g_override_embedded_ptx;
+ std::set<unsigned long long> g_ptx_cta_info_sm_idx_used;
+ ptx_reg_t* ptx_tex_regs;
+ unsigned g_ptx_thread_info_delete_count;
+ unsigned g_ptx_thread_info_uid_next;
+ addr_t g_debug_pc;
// backward pointer
class gpgpu_context* gpgpu_ctx;
//global functions
diff --git a/src/cuda-sim/cuda_device_runtime.cc b/src/cuda-sim/cuda_device_runtime.cc
index 354fa79..dc3adc3 100644
--- a/src/cuda-sim/cuda_device_runtime.cc
+++ b/src/cuda-sim/cuda_device_runtime.cc
@@ -5,8 +5,6 @@
#include <iostream>
#include <map>
-unsigned long long g_total_param_size = 0;
-unsigned long long g_max_total_param_size = 0;
#if (CUDART_VERSION >= 5000)
@@ -28,49 +26,12 @@ unsigned long long g_max_total_param_size = 0;
std::cout.flush(); \
}
-class device_launch_config_t {
-public:
- device_launch_config_t() {}
-
- device_launch_config_t(dim3 _grid_dim,
- dim3 _block_dim,
- unsigned int _shared_mem,
- function_info * _entry):
- grid_dim(_grid_dim),
- block_dim(_block_dim),
- shared_mem(_shared_mem),
- entry(_entry) {}
-
- dim3 grid_dim;
- dim3 block_dim;
- unsigned int shared_mem;
- function_info * entry;
-
-};
-
-class device_launch_operation_t {
-
-public:
- device_launch_operation_t() {}
- device_launch_operation_t(kernel_info_t *_grid,
- CUstream_st * _stream) :
- grid(_grid), stream(_stream) {}
-
- kernel_info_t * grid; //a new child grid
-
- CUstream_st * stream;
-
-};
-
-
-std::map<void *, device_launch_config_t> g_cuda_device_launch_param_map;
-std::list<device_launch_operation_t> g_cuda_device_launch_op;
//extern stream_manager *g_stream_manager();
//Handling device runtime api:
//void * cudaGetParameterBufferV2(void *func, dim3 gridDimension, dim3 blockDimension, unsigned int sharedMemSize)
-void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func)
+void cuda_device_runtime::gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func)
{
DEV_RUNTIME_REPORT("Calling cudaGetParameterBufferV2");
@@ -143,7 +104,7 @@ void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_i
//Handling device runtime api:
//cudaError_t cudaLaunchDeviceV2(void *parameterBuffer, cudaStream_t stream)
-void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
+void cuda_device_runtime::gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
DEV_RUNTIME_REPORT("Calling cudaLaunchDeviceV2");
unsigned n_return = target_func->has_return();
@@ -264,7 +225,7 @@ void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info *
//Handling device runtime api:
//cudaError_t cudaStreamCreateWithFlags ( cudaStream_t* pStream, unsigned int flags)
//flags can only be cudaStreamNonBlocking
-void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
+void cuda_device_runtime::gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
DEV_RUNTIME_REPORT("Calling cudaStreamCreateWithFlags");
unsigned n_return = target_func->has_return();
diff --git a/src/cuda-sim/cuda_device_runtime.h b/src/cuda-sim/cuda_device_runtime.h
index 851fed2..7f7a0ca 100644
--- a/src/cuda-sim/cuda_device_runtime.h
+++ b/src/cuda-sim/cuda_device_runtime.h
@@ -1,25 +1,68 @@
+#ifndef __cuda_device_runtime_h__
+#define __cuda_device_runtime_h__
//Jin: cuda_device_runtime.h
//Defines CUDA device runtime APIs for CDP support
-#if (CUDART_VERSION >= 5000)
-#pragma once
+class device_launch_config_t {
-void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-#endif
-#if (CUDART_VERSION >= 5000)
+public:
+ device_launch_config_t() {}
+
+ device_launch_config_t(dim3 _grid_dim,
+ dim3 _block_dim,
+ unsigned int _shared_mem,
+ function_info * _entry):
+ grid_dim(_grid_dim),
+ block_dim(_block_dim),
+ shared_mem(_shared_mem),
+ entry(_entry) {}
+
+ dim3 grid_dim;
+ dim3 block_dim;
+ unsigned int shared_mem;
+ function_info * entry;
+
+};
+
+class device_launch_operation_t {
+
+public:
+ device_launch_operation_t() {}
+ device_launch_operation_t(kernel_info_t *_grid,
+ CUstream_st * _stream) :
+ grid(_grid), stream(_stream) {}
+
+ kernel_info_t * grid; //a new child grid
+
+ CUstream_st * stream;
+
+};
class gpgpu_context;
class cuda_device_runtime {
public:
cuda_device_runtime( gpgpu_context* ctx ) {
+ g_total_param_size = 0;
+ g_max_total_param_size = 0;
gpgpu_ctx = ctx;
}
+ unsigned long long g_total_param_size;
+ std::map<void *, device_launch_config_t> g_cuda_device_launch_param_map;
+ std::list<device_launch_operation_t> g_cuda_device_launch_op;
+ unsigned g_kernel_launch_latency;
+ unsigned long long g_max_total_param_size;
+ bool g_cdp_enabled;
+
// backward pointer
class gpgpu_context* gpgpu_ctx;
+#if (CUDART_VERSION >= 5000)
+#pragma once
+ void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
+ void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
+ void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
void launch_all_device_kernels();
void launch_one_device_kernel();
+#endif
};
-#endif
+#endif /* __cuda_device_runtime_h__ */
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 46a262d..58a077e 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -56,10 +56,10 @@ class ptx_recognizer;
#include "cuda_device_runtime.h"
#include <stdarg.h>
+#include "../../libcuda/gpgpu_context.h"
+
using half_float::half;
-unsigned ptx_instruction::g_num_ptx_inst_uid=0;
-bool debug_tensorcore = 0;
const char *g_opcode_string[NUM_OPCODES] = {
@@ -1839,14 +1839,14 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
for (thrd=0; thrd < core->get_warp_size(); thrd++){
thread = core->get_thread_info()[tid+thrd];
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("THREAD=%d\n:",thrd);
for(int operand_num=1;operand_num<=3;operand_num++){
const operand_info &src_a= pI->operand_lookup(operand_num);
unsigned nelem = src_a.get_vect_nelem();
ptx_reg_t v[8];
thread->get_vector_operand_values( src_a, v, nelem );
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("Thread%d_Iteration=%d\n:",thrd,operand_num);
for(k=0;k<nelem;k++){
printf("%x ",v[k].u64);
@@ -1868,14 +1868,14 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
if(!((operand_num==3)&&(type2==F32_TYPE))){
for(k=0;k<2*nelem;k++){
temp=nw_v[k].f16;
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("%.2f ",temp);
}
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("\n");
}
else{
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
for(k=0;k<8;k++){
printf("%.2f ",v[k].f32);
}
@@ -1886,7 +1886,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
case 1 ://operand 1
for(k=0;k<8;k++){
mapping(thrd,LOAD_A,a_layout,F16_TYPE,k,16,row,col,offset);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("A:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
matrix_a[row][col]=nw_v[offset];
}
@@ -1894,7 +1894,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
case 2 ://operand 2
for(k=0;k<8;k++){
mapping(thrd,LOAD_B,b_layout,F16_TYPE,k,16,row,col,offset);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("B:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
matrix_b[row][col]=nw_v[offset];
}
@@ -1902,7 +1902,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
case 3 ://operand 3
for(k=0;k<8;k++){
mapping(thrd,LOAD_C,ROW,type2,k,16,row,col,offset);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("C:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
if(type2!=F16_TYPE){
matrix_c[row][col]=v[offset];
@@ -1916,10 +1916,10 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
printf("Invalid Operand Index\n" );
}
}
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("\n");
}
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("MATRIX_A\n");
for (i=0;i<16;i++){
for(j=0;j<16;j++){
@@ -1979,7 +1979,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
}
}
}
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("MATRIX_D\n");
for (i=0;i<16;i++){
for(j=0;j<16;j++){
@@ -1998,7 +1998,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
int col_t[8];
for(k=0;k<8;k++){
mapping(thrd,LOAD_C,ROW,type,k,16,row_t[k],col_t[k],offset);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("mma:store:row:%d,col%d\n",row_t[k],col_t[k]);
}
thread = core->get_thread_info()[tid+thrd];
@@ -2007,7 +2007,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
if(type==F32_TYPE){
thread->set_wmma_vector_operand_values(dst,matrix_d[row_t[0]][col_t[0]],matrix_d[row_t[1]][col_t[1]],matrix_d[row_t[2]][col_t[2]],matrix_d[row_t[3]][col_t[3]],matrix_d[row_t[4]][col_t[4]],matrix_d[row_t[5]][col_t[5]],matrix_d[row_t[6]][col_t[6]],matrix_d[row_t[7]][col_t[7]]);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
{
printf("thread%d:",thrd);
for(k=0;k<8;k++){
@@ -2017,7 +2017,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
}
}
else if(type==F16_TYPE){
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("thread%d:",thrd);
for(k=0;k<8;k++){
temp=matrix_d[row_t[k]][col_t[k]].f16;
@@ -2037,7 +2037,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
nw_data3.s64=((matrix_d[row_t[4]][col_t[4]].s64 & 0xffff))|((matrix_d[row_t[5]][col_t[5]].s64&0xffff)<<16);
nw_data4.s64=((matrix_d[row_t[6]][col_t[6]].s64 & 0xffff))|((matrix_d[row_t[7]][col_t[7]].s64&0xffff)<<16);
thread->set_vector_operand_values(dst,nw_data1,nw_data2,nw_data3,nw_data4);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("thread%d=%x,%x,%x,%x",thrd,nw_data1.s64,nw_data2.s64,nw_data3.s64,nw_data4.s64);
}
@@ -2095,15 +2095,15 @@ void call_impl( const ptx_instruction *pI, ptx_thread_info *thread )
#if (CUDART_VERSION >= 5000)
//Jin: handle device runtime apis for CDP
else if(fname == "cudaGetParameterBufferV2") {
- gpgpusim_cuda_getParameterBufferV2(pI, thread, target_func);
+ target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_getParameterBufferV2(pI, thread, target_func);
return;
}
else if(fname == "cudaLaunchDeviceV2") {
- gpgpusim_cuda_launchDeviceV2(pI, thread, target_func);
+ target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_launchDeviceV2(pI, thread, target_func);
return;
}
else if(fname == "cudaStreamCreateWithFlags") {
- gpgpusim_cuda_streamCreateWithFlags(pI, thread, target_func);
+ target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_streamCreateWithFlags(pI, thread, target_func);
return;
}
#endif
@@ -3131,7 +3131,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
decode_space(space,thread,src1,mem,addr);
type_info_key::type_decode(type,size,t);
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("mma_st: thrd=%d,addr=%x, fp(size=%d), stride=%d\n",thrd,addr_reg.u32,size,src2_data.u32);
addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;
addr_t push_addr;
@@ -3151,7 +3151,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
mem->write(push_addr,size/8,&v[k].s64,thread,pI);
mem_txn_addr[num_mem_txn++]=push_addr;
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,v[0].s64,v[1].s64,v[2].s64,v[3].s64,v[4].s64,v[5].s64,v[6].s64,v[7].s64);
float temp;
int l;
@@ -3178,7 +3178,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
mem_txn_addr[num_mem_txn++]=push_addr;
}
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,nw_v[0].s64,nw_v[1].s64,nw_v[2].s64,nw_v[3].s64,nw_v[4].s64,nw_v[5].s64,nw_v[6].s64,nw_v[7].s64);
}
}
@@ -3241,7 +3241,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
type_info_key::type_decode(type,size,t);
ptx_reg_t data[16];
- if(debug_tensorcore)
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
printf("mma_ld: thrd=%d,addr=%x, fpsize=%d, stride=%d\n",thrd,src1_data.u32,size,src2_data.u32);
addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;
@@ -3337,7 +3337,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
inst.data_size = 4; // 4 byte transaction
assert( inst.memory_op == insn_memory_op );
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
if(type==F16_TYPE){
printf("\nmma_ld:thread%d= ",thrd);
for(i=0;i<16;i++){
@@ -3387,7 +3387,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
thread->set_vector_operand_values(dst,nw_data[0],nw_data[1],nw_data[2],nw_data[3]);
else
thread->set_wmma_vector_operand_values(dst,nw_data[0],nw_data[1],nw_data[2],nw_data[3],nw_data[4],nw_data[5],nw_data[6],nw_data[7]);
- if(debug_tensorcore){
+ if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
printf("mma_ld:data[0].s64=%x,data[1].s64=%x,new_data[0].s64=%x\n",data[0].u64,data[1].u64,nw_data[0].u64);
printf("mma_ld:data[2].s64=%x,data[3].s64=%x,new_data[1].s64=%x\n",data[2].u64,data[3].u64,nw_data[1].u64);
printf("mma_ld:data[4].s64=%x,data[5].s64=%x,new_data[2].s64=%x\n",data[4].u64,data[5].u64,nw_data[2].u64);
@@ -5144,7 +5144,6 @@ void sured_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not
void sust_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
void suq_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
-ptx_reg_t* ptx_tex_regs = NULL;
union intfloat {
int a;
@@ -5258,9 +5257,10 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
unsigned c_type = pI->get_type2();
fflush(stdout);
ptx_reg_t data1, data2, data3, data4;
- if (!ptx_tex_regs) ptx_tex_regs = new ptx_reg_t[4];
+ if (!thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs)
+ thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs = new ptx_reg_t[4];
unsigned nelem = src2.get_vect_nelem();
- thread->get_vector_operand_values(src2, ptx_tex_regs, nelem); //ptx_reg should be 4 entry vector type...coordinates into texture
+ thread->get_vector_operand_values(src2, thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs, nelem); //ptx_reg should be 4 entry vector type...coordinates into texture
/*
For programs with many streams, textures can be bound and unbound
asynchronously. This means we need to use the kernel's "snapshot" of
@@ -5297,7 +5297,7 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
height = cuArray->height;
if (texref->normalized) {
assert(c_type == F32_TYPE);
- x_f32 = ptx_tex_regs[0].f32;
+ x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
if (texref->addressMode[0] == cudaAddressModeClamp) {
x_f32 = (x_f32 > 1.0)? 1.0 : x_f32;
x_f32 = (x_f32 < 0.0)? 0.0 : x_f32;
@@ -5320,11 +5320,11 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
} else {
switch ( c_type ) {
case S32_TYPE:
- x = ptx_tex_regs[0].s32;
+ x = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].s32;
assert(texref->filterMode == cudaFilterModePoint);
break;
case F32_TYPE:
- x_f32 = ptx_tex_regs[0].f32;
+ x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
alpha = x_f32 - floor(x_f32); // offset into subtexel (for linear sampling)
x = (int) x_f32;
break;
@@ -5347,8 +5347,8 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
width = cuArray->width;
height = cuArray->height;
if (texref->normalized) {
- x_f32 = reduce_precision(ptx_tex_regs[0].f32,16);
- y_f32 = reduce_precision(ptx_tex_regs[1].f32,15);
+ x_f32 = reduce_precision(thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32,16);
+ y_f32 = reduce_precision(thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[1].f32,15);
if (texref->addressMode[0]) {//clamp
if (x_f32<0) x_f32 = 0;
@@ -5378,8 +5378,8 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
y = (int) floor(y_f32 * height);
}
} else {
- x_f32 = ptx_tex_regs[0].f32;
- y_f32 = ptx_tex_regs[1].f32;
+ x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
+ y_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[1].f32;
alpha = x_f32 - floor(x_f32);
beta = y_f32 - floor(y_f32);
diff --git a/src/cuda-sim/memory.cc b/src/cuda-sim/memory.cc
index 9554f55..4b2acdf 100644
--- a/src/cuda-sim/memory.cc
+++ b/src/cuda-sim/memory.cc
@@ -28,6 +28,7 @@
#include "memory.h"
#include <stdlib.h>
#include "../debug.h"
+#include "../../libcuda/gpgpu_context.h"
template<unsigned BSIZE> memory_space_impl<BSIZE>::memory_space_impl( std::string name, unsigned hash_size )
{
@@ -88,7 +89,7 @@ template<unsigned BSIZE> void memory_space_impl<BSIZE>::write( mem_addr_t addr,
for( i=m_watchpoints.begin(); i!=m_watchpoints.end(); i++ ) {
mem_addr_t wa = i->second;
if( ((addr<=wa) && ((addr+length)>wa)) || ((addr>wa) && (addr < (wa+4))) )
- hit_watchpoint(i->first,thd,pI);
+ thd->get_gpu()->gpgpu_ctx->the_gpgpusim->g_the_gpu->hit_watchpoint(i->first,thd,pI);
}
}
}
diff --git a/src/cuda-sim/ptx-stats.cc b/src/cuda-sim/ptx-stats.cc
index 0a9f08d..22517df 100644
--- a/src/cuda-sim/ptx-stats.cc
+++ b/src/cuda-sim/ptx-stats.cc
@@ -32,12 +32,9 @@
#include <stdio.h>
#include <map>
#include "../tr1_hash_map.h"
+#include "../../libcuda/gpgpu_context.h"
-// options
-bool enable_ptx_file_line_stats;
-char * ptx_line_stats_filename = NULL;
-
-void ptx_file_line_stats_options(option_parser_t opp)
+void ptx_stats::ptx_file_line_stats_options(option_parser_t opp)
{
option_parser_register(opp, "-enable_ptx_file_line_stats", OPT_BOOL,
&enable_ptx_file_line_stats,
@@ -118,7 +115,7 @@ typedef tr1_hash_map<ptx_file_line, ptx_file_line_stats, hash_ptx_file_line> ptx
static ptx_file_line_stats_map_t ptx_file_line_stats_tracker;
// output statistics to a file
-void ptx_file_line_stats_write_file()
+void ptx_stats::ptx_file_line_stats_write_file()
{
// check if stat collection is turned on
if (enable_ptx_file_line_stats == 0) return;
@@ -154,27 +151,27 @@ void ptx_file_line_stats_add_exec_count(const ptx_instruction *pInsn)
// attribute pipeline latency to this ptx instruction (specified by the pc)
// pipeline latency is the number of cycles a warp with this instruction spent in the pipeline
-void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency)
+void ptx_stats::ptx_file_line_stats_add_latency(unsigned pc, unsigned latency)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].latency += latency;
}
// attribute dram traffic to this ptx instruction (specified by the pc)
// dram traffic is counted in number of requests
-void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic)
+void ptx_stats::ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].dram_traffic += dram_traffic;
}
// attribute the number of shared memory access cycles to a ptx instruction
// counts both the number of warps doing shared memory access and the number of cycles involved
-void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict)
+void ptx_stats::ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
line_stats.smem_n_way_bank_conflict_total += n_way_bkconflict;
@@ -183,9 +180,9 @@ void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkco
// attribute a non-coalesced mem access to a ptx instruction
// counts both the number of warps causing this and the number of memory requests generated
-void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access)
+void ptx_stats::ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
line_stats.gmem_n_access_total += n_access;
@@ -242,17 +239,17 @@ void ptx_file_line_stats_create_exposed_latency_tracker(int n_shader_cores)
}
// add an inflight memory instruction
-void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc)
+void ptx_stats::ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
inflight_mem_tracker[sc_id].add_count(pInsn);
}
// remove an inflight memory instruction
-void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc)
+void ptx_stats::ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
inflight_mem_tracker[sc_id].sub_count(pInsn);
}
@@ -265,9 +262,9 @@ void ptx_file_line_stats_commit_exposed_latency(int sc_id, int exposed_latency)
}
// attribute the number of warp divergence to a ptx instruction
-void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence)
+void ptx_stats::ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence)
{
- const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+ const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
line_stats.warp_divergence += n_way_divergence;
diff --git a/src/cuda-sim/ptx-stats.h b/src/cuda-sim/ptx-stats.h
index 4fc6599..246b4ce 100644
--- a/src/cuda-sim/ptx-stats.h
+++ b/src/cuda-sim/ptx-stats.h
@@ -29,13 +29,6 @@
#include "../option_parser.h"
-extern bool enable_ptx_file_line_stats;
-
-// set options
-void ptx_file_line_stats_options(option_parser_t opp);
-
-// output stats to a file
-void ptx_file_line_stats_write_file();
#ifdef __cplusplus
// stat collection interface to cuda-sim
@@ -44,15 +37,32 @@ void ptx_file_line_stats_add_exec_count(const ptx_instruction *pInsn);
#endif
// stat collection interface to gpgpu-sim
-void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency);
-void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic);
-void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict);
-void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access);
void ptx_file_line_stats_create_exposed_latency_tracker(int n_shader_cores);
-void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc);
-void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc);
void ptx_file_line_stats_commit_exposed_latency(int sc_id, int exposed_latency);
-void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence);
+class gpgpu_context;
+class ptx_stats {
+ public:
+ ptx_stats(gpgpu_context* ctx) {
+ ptx_line_stats_filename = NULL;
+ gpgpu_ctx = ctx;
+ }
+ char * ptx_line_stats_filename;
+ bool enable_ptx_file_line_stats;
+ gpgpu_context* gpgpu_ctx;
+ // set options
+ void ptx_file_line_stats_options(option_parser_t opp);
+
+ // output stats to a file
+ void ptx_file_line_stats_write_file();
+ // stat collection interface to gpgpu-sim
+ void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency);
+ void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic);
+ void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict);
+ void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access);
+ void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc);
+ void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc);
+ void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence);
+};
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index c537091..3384d49 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -39,14 +39,21 @@ typedef void * yyscan_t;
#include "assert.h"
#include "cuda-sim.h"
+#include "../../libcuda/gpgpu_context.h"
#define STR_SIZE 1024
-unsigned symbol::sm_next_uid = 1;
+const ptx_instruction* gpgpu_context::pc_to_instruction(unsigned pc)
+{
+ if( pc < s_g_pc_to_insn.size() )
+ return s_g_pc_to_insn[pc];
+ else
+ return NULL;
+}
unsigned symbol::get_uid()
{
- unsigned result = sm_next_uid++;
+ unsigned result = (gpgpu_ctx->symbol_sm_next_uid)++;
return result;
}
@@ -151,7 +158,7 @@ symbol *symbol_table::add_variable( const char *identifier, const type_info *typ
std::string key(identifier);
assert( m_symbols.find(key) == m_symbols.end() );
snprintf(buf,1024,"%s:%u",filename,line);
- symbol *s = new symbol(identifier,type,buf,size);
+ symbol *s = new symbol(identifier,type,buf,size,gpgpu_ctx);
m_symbols[ key ] = s;
if ( type != NULL && type->get_key().is_global() ) {
@@ -172,7 +179,7 @@ void symbol_table::add_function( function_info *func, const char *filename, unsi
char buf[1024];
snprintf(buf,1024,"%s:%u",filename,linenumber);
type_info *type = add_type( func );
- symbol *s = new symbol(func->get_name().c_str(),type,buf,0);
+ symbol *s = new symbol(func->get_name().c_str(),type,buf,0,gpgpu_ctx);
s->set_function(func);
m_symbols[ func->get_name() ] = s;
}
@@ -322,11 +329,9 @@ void symbol_table::dump()
printf("\n");
}
-unsigned operand_info::sm_next_uid=1;
-
unsigned operand_info::get_uid()
{
- unsigned result = sm_next_uid++;
+ unsigned result = (gpgpu_ctx->operand_info_sm_next_uid)++;
return result;
}
@@ -1015,7 +1020,7 @@ void copy_buffer_to_frame(ptx_thread_info * thread, const arg_buffer_t &a)
{
if( a.is_reg() ) {
ptx_reg_t value = a.get_reg();
- operand_info dst_reg = operand_info(a.get_dst());
+ operand_info dst_reg = operand_info(a.get_dst(), thread->get_gpu()->gpgpu_ctx);
thread->set_reg(dst_reg.get_symbol(),value);
} else {
const void *buffer = a.get_param_buffer();
@@ -1039,7 +1044,8 @@ void copy_buffer_list_into_frame(ptx_thread_info * thread, arg_buffer_list_t &ar
static std::list<operand_info> check_operands( int opcode,
const std::list<int> &scalar_type,
- const std::list<operand_info> &operands )
+ const std::list<operand_info> &operands,
+ gpgpu_context* ctx)
{
static int g_warn_literal_operands_two_type_inst;
if( (opcode == CVT_OP) || (opcode == SET_OP) || (opcode == SLCT_OP) || (opcode == TEX_OP) || (opcode==MMA_OP) || (opcode == DP4A_OP)) {
@@ -1066,7 +1072,7 @@ static std::list<operand_info> check_operands( int opcode,
if( (op.get_type() == double_op_t) && (inst_type == F32_TYPE) ) {
ptx_reg_t v = op.get_literal_value();
float u = (float)v.f64;
- operand_info n(u);
+ operand_info n(u, ctx);
result.push_back(n);
} else {
result.push_back(op);
@@ -1097,17 +1103,17 @@ ptx_instruction::ptx_instruction( int opcode,
unsigned line,
const char *source,
const core_config *config,
- gpgpu_context* ctx ) : warp_inst_t(config)
+ gpgpu_context* ctx ) : warp_inst_t(config), m_return_var(ctx)
{
gpgpu_ctx = ctx;
- m_uid = ++g_num_ptx_inst_uid;
+ m_uid = ++(ctx->g_num_ptx_inst_uid);
m_PC = 0;
m_opcode = opcode;
m_pred = pred;
m_neg_pred = neg_pred;
m_pred_mod = pred_mod;
m_label = label;
- const std::list<operand_info> checked_operands = check_operands(opcode,scalar_type,operands);
+ const std::list<operand_info> checked_operands = check_operands(opcode,scalar_type,operands, ctx);
m_operands.insert(m_operands.begin(), checked_operands.begin(), checked_operands.end() );
m_return_var = return_var;
m_options = options;
@@ -1371,13 +1377,16 @@ std::string ptx_instruction::to_string() const
m_source.c_str() );
return std::string( buf );
}
+operand_info ptx_instruction::get_pred() const
+{
+ return operand_info( m_pred, gpgpu_ctx);
+}
-unsigned function_info::sm_next_uid = 1;
function_info::function_info(int entry_point, gpgpu_context* ctx )
{
gpgpu_ctx = ctx;
- m_uid = sm_next_uid++;
+ m_uid = (gpgpu_ctx->function_info_sm_next_uid)++;
m_entry_point = (entry_point==1)?true:false;
m_extern = (entry_point==2)?true:false;
num_reconvergence_pairs = 0;
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index babd54b..f4c5c37 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -152,8 +152,9 @@ class operand_info;
class symbol {
public:
- symbol( const char *name, const type_info *type, const char *location, unsigned size )
+ symbol( const char *name, const type_info *type, const char *location, unsigned size, gpgpu_context* ctx )
{
+ gpgpu_ctx = ctx;
m_uid = get_uid();
m_name = name;
m_decl_location = location;
@@ -273,6 +274,7 @@ public:
unsigned uid() const { return m_uid; }
private:
+ gpgpu_context* gpgpu_ctx;
unsigned get_uid();
unsigned m_uid;
const type_info *m_type;
@@ -299,8 +301,6 @@ private:
bool m_reg_num_valid;
std::list<operand_info> m_initializer;
- static unsigned sm_next_uid;
-
};
class symbol_table {
@@ -377,9 +377,9 @@ private:
class operand_info {
public:
- operand_info()
+ operand_info(gpgpu_context* ctx)
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -392,9 +392,9 @@ public:
m_addr_offset = 0;
m_value.m_symbolic=NULL;
}
- operand_info( const symbol *addr )
+ operand_info( const symbol *addr, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -435,9 +435,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( const symbol *addr1, const symbol *addr2 )
+ operand_info( const symbol *addr1, const symbol *addr2, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -462,9 +462,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( int builtin_id, int dim_mod )
+ operand_info( int builtin_id, int dim_mod, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -481,9 +481,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( const symbol *addr, int offset )
+ operand_info( const symbol *addr, int offset, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -500,9 +500,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( unsigned x )
+ operand_info( unsigned x, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -519,9 +519,9 @@ public:
m_is_return_var = false;
m_immediate_address=true;
}
- operand_info( int x )
+ operand_info( int x, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -538,9 +538,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( float x )
+ operand_info( float x, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -557,9 +557,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( double x )
+ operand_info( double x, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -576,9 +576,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 )
+ operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4, gpgpu_context* ctx )
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -603,9 +603,9 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
- operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 ,const symbol *s5,const symbol *s6,const symbol *s7, const symbol *s8)
+ operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 ,const symbol *s5,const symbol *s6,const symbol *s7, const symbol *s8, gpgpu_context* ctx)
{
- init();
+ init(ctx);
m_is_non_arch_reg = false;
m_addr_space = undefined_space;
m_operand_lohi = 0;
@@ -631,8 +631,9 @@ public:
m_immediate_address=false;
}
- void init()
+ void init(gpgpu_context* ctx)
{
+ gpgpu_ctx = ctx;
m_uid=(unsigned)-1;
m_valid=false;
m_vector=false;
@@ -842,6 +843,7 @@ public:
bool is_non_arch_reg() const { return m_is_non_arch_reg; }
private:
+ gpgpu_context* gpgpu_ctx;
unsigned m_uid;
bool m_valid;
bool m_vector;
@@ -871,12 +873,10 @@ private:
bool m_is_return_var;
bool m_is_non_arch_reg;
- static unsigned sm_next_uid;
unsigned get_uid();
};
extern const char *g_opcode_string[];
-extern unsigned g_num_ptx_inst_uid;
struct basic_block_t {
basic_block_t( unsigned ID, ptx_instruction *begin, ptx_instruction *end, bool entry, bool ex)
{
@@ -957,7 +957,7 @@ public:
unsigned source_line() const { return m_source_line;}
unsigned get_num_operands() const { return m_operands.size();}
bool has_pred() const { return m_pred != NULL;}
- operand_info get_pred() const { return operand_info( m_pred );}
+ operand_info get_pred() const;
bool get_pred_neg() const { return m_neg_pred;}
int get_pred_mod() const { return m_pred_mod;}
const char *get_source() const { return m_source.c_str();}
@@ -1192,7 +1192,6 @@ private:
virtual void pre_decode();
friend class function_info;
- static unsigned g_num_ptx_inst_uid;
// backward pointer
class gpgpu_context* gpgpu_ctx;
};
@@ -1373,13 +1372,6 @@ public:
return m_symtab;
}
- static const ptx_instruction* pc_to_instruction(unsigned pc)
- {
- if( pc < s_g_pc_to_insn.size() )
- return s_g_pc_to_insn[pc];
- else
- return NULL;
- }
unsigned local_mem_framesize() const
{
return m_local_mem_framesize;
@@ -1437,9 +1429,6 @@ private:
symbol_table *m_symtab;
- static std::vector<ptx_instruction*> s_g_pc_to_insn; // a direct mapping from PC to instruction
- static unsigned sm_next_uid;
-
//parameter size for device kernels
int m_args_aligned_size;
@@ -1448,14 +1437,14 @@ private:
class arg_buffer_t {
public:
- arg_buffer_t()
+ arg_buffer_t(gpgpu_context* ctx) : m_src_op(ctx)
{
m_is_reg=false;
m_is_param=false;
m_param_value=NULL;
m_reg_value=ptx_reg_t();
}
- arg_buffer_t( const arg_buffer_t &another )
+ arg_buffer_t( const arg_buffer_t &another, gpgpu_context* ctx ) : m_src_op(ctx)
{
make_copy(another);
}
diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc
index 2bf464c..dca3cec 100644
--- a/src/cuda-sim/ptx_loader.cc
+++ b/src/cuda-sim/ptx_loader.cc
@@ -35,10 +35,6 @@
#include <sstream>
#include "../../libcuda/gpgpu_context.h"
-/// globals
-
-bool g_override_embedded_ptx = false;
-
/// extern prototypes
extern int ptx_error( yyscan_t yyscanner, const char *s );
@@ -90,7 +86,7 @@ void gpgpu_context::print_ptx_file( const char *p, unsigned source_num, const ch
while ( (*u != '\n') && (*u != '\0') ) u++;
unsigned last = (*u == '\0');
*u = '\0';
- const ptx_instruction *pI = ptx_instruction_lookup(filename,n);
+ const ptx_instruction *pI = ptx_parser->ptx_instruction_lookup(filename,n);
char pc[64];
if( pI && pI->get_PC() )
snprintf(pc,64,"%4u", pI->get_PC() );
@@ -334,8 +330,7 @@ void gpgpu_context::gpgpu_ptx_info_load_from_filename( const char *filename, uns
std::string ptxas_filename(std::string(filename) + "as");
char buff[1024], extra_flags[1024];
extra_flags[0]=0;
- extern bool g_cdp_enabled;
- if(!g_cdp_enabled)
+ if(!device_runtime->g_cdp_enabled)
snprintf(extra_flags,1024,"--gpu-name=sm_%u",sm_version);
else
snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",sm_version);
@@ -402,8 +397,7 @@ void gpgpu_context::gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsi
"A register size/SM mismatch may result in occupancy differences." );
exit(1);
}
- extern bool g_cdp_enabled;
- if(!g_cdp_enabled)
+ if(!device_runtime->g_cdp_enabled)
snprintf(extra_flags,1024,"--gpu-name=sm_%u", g_occupancy_sm_number);
else
snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",g_occupancy_sm_number);
@@ -471,8 +465,7 @@ void gpgpu_context::gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsi
#if CUDART_VERSION >= 3000
if (sm_version == 0) sm_version = 20;
- extern bool g_cdp_enabled;
- if(!g_cdp_enabled)
+ if(!device_runtime->g_cdp_enabled)
snprintf(extra_flags,1024,"--gpu-name=sm_%u",sm_version);
else
snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",sm_version);
diff --git a/src/cuda-sim/ptx_loader.h b/src/cuda-sim/ptx_loader.h
index decfdc8..d8f1cbc 100644
--- a/src/cuda-sim/ptx_loader.h
+++ b/src/cuda-sim/ptx_loader.h
@@ -49,8 +49,4 @@ class ptxinfo_data{
char* gpgpu_ptx_sim_convert_ptx_and_sass_to_ptxplus(const std::string ptx_str, const std::string sass_str, const std::string elf_str);
};
-
-extern bool g_override_embedded_ptx;
-extern int no_of_ptx; //counter to track number of ptx files to be extracted in an application.
-
#endif
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index 5a94679..81b70af 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -47,8 +47,6 @@ void ptx_recognizer::set_ptx_warp_size(const struct core_config * warp_size)
g_shader_core_config=warp_size;
}
-// the program intermediate representation...
-std::map<std::string,symbol_table*> g_sym_name_to_symbol_table;
#define PTX_PARSE_DPRINTF(...) \
if( g_debug_ir_generation ) { \
@@ -104,7 +102,7 @@ void ptx_recognizer::init_instruction_state()
g_opcode = -1;
g_options.clear();
g_wmma_options.clear();
- g_return_var = operand_info();
+ g_return_var = operand_info(gpgpu_ctx);
init_directive_state();
}
@@ -254,9 +252,8 @@ void ptx_recognizer::set_return()
g_return_var = g_operands.front();
}
-std::map<std::string,std::map<unsigned,const ptx_instruction*> > g_inst_lookup;
-const ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber )
+const ptx_instruction *ptx_recognizer::ptx_instruction_lookup( const char *filename, unsigned linenumber )
{
std::map<std::string,std::map<unsigned,const ptx_instruction*> >::iterator f=g_inst_lookup.find(filename);
if( f == g_inst_lookup.end() )
@@ -692,7 +689,7 @@ void ptx_recognizer::add_double_operand( const char *d1, const char *d2 )
const symbol *s1 = g_current_symbol_table->lookup(d1);
const symbol *s2 = g_current_symbol_table->lookup(d2);
parse_assert( s1 != NULL && s2 != NULL, "component(s) missing declarations.");
- g_operands.push_back( operand_info(s1,s2) );
+ g_operands.push_back( operand_info(s1,s2,gpgpu_ctx) );
}
void ptx_recognizer::add_1vector_operand( const char *d1 )
@@ -701,7 +698,7 @@ void ptx_recognizer::add_1vector_operand( const char *d1 )
PTX_PARSE_DPRINTF("add_1vector_operand");
const symbol *s1 = g_current_symbol_table->lookup(d1);
parse_assert( s1 != NULL, "component(s) missing declarations.");
- g_operands.push_back( operand_info(s1,NULL,NULL,NULL) );
+ g_operands.push_back( operand_info(s1,NULL,NULL,NULL,gpgpu_ctx) );
}
void ptx_recognizer::add_2vector_operand( const char *d1, const char *d2 )
@@ -710,7 +707,7 @@ void ptx_recognizer::add_2vector_operand( const char *d1, const char *d2 )
const symbol *s1 = g_current_symbol_table->lookup(d1);
const symbol *s2 = g_current_symbol_table->lookup(d2);
parse_assert( s1 != NULL && s2 != NULL, "v2 component(s) missing declarations.");
- g_operands.push_back( operand_info(s1,s2,NULL,NULL) );
+ g_operands.push_back( operand_info(s1,s2,NULL,NULL,gpgpu_ctx) );
}
void ptx_recognizer::add_3vector_operand( const char *d1, const char *d2, const char *d3 )
@@ -720,7 +717,7 @@ void ptx_recognizer::add_3vector_operand( const char *d1, const char *d2, const
const symbol *s2 = g_current_symbol_table->lookup(d2);
const symbol *s3 = g_current_symbol_table->lookup(d3);
parse_assert( s1 != NULL && s2 != NULL && s3 != NULL, "v3 component(s) missing declarations.");
- g_operands.push_back( operand_info(s1,s2,s3,NULL) );
+ g_operands.push_back( operand_info(s1,s2,s3,NULL,gpgpu_ctx) );
}
void ptx_recognizer::add_4vector_operand( const char *d1, const char *d2, const char *d3, const char *d4 )
@@ -735,7 +732,7 @@ void ptx_recognizer::add_4vector_operand( const char *d1, const char *d2, const
if ( s2 == null_op ) s2 = NULL;
if ( s3 == null_op ) s3 = NULL;
if ( s4 == null_op ) s4 = NULL;
- g_operands.push_back( operand_info(s1,s2,s3,s4) );
+ g_operands.push_back( operand_info(s1,s2,s3,s4,gpgpu_ctx) );
}
void ptx_recognizer::add_8vector_operand( const char *d1, const char *d2, const char *d3, const char *d4,const char *d5,const char *d6,const char *d7,const char *d8 )
{
@@ -757,13 +754,13 @@ void ptx_recognizer::add_8vector_operand( const char *d1, const char *d2, const
if ( s6 == null_op ) s6 = NULL;
if ( s7 == null_op ) s7 = NULL;
if ( s8 == null_op ) s8 = NULL;
- g_operands.push_back( operand_info(s1,s2,s3,s4,s5,s6,s7,s8) );
+ g_operands.push_back( operand_info(s1,s2,s3,s4,s5,s6,s7,s8,gpgpu_ctx) );
}
void ptx_recognizer::add_builtin_operand( int builtin, int dim_modifier )
{
PTX_PARSE_DPRINTF("add_builtin_operand");
- g_operands.push_back( operand_info(builtin,dim_modifier) );
+ g_operands.push_back( operand_info(builtin,dim_modifier,gpgpu_ctx) );
}
void ptx_recognizer::add_memory_operand()
@@ -886,19 +883,19 @@ void ptx_recognizer::change_operand_neg( )
void ptx_recognizer::add_literal_int( int value )
{
PTX_PARSE_DPRINTF("add_literal_int");
- g_operands.push_back( operand_info(value) );
+ g_operands.push_back( operand_info(value,gpgpu_ctx) );
}
void ptx_recognizer::add_literal_float( float value )
{
PTX_PARSE_DPRINTF("add_literal_float");
- g_operands.push_back( operand_info(value) );
+ g_operands.push_back( operand_info(value,gpgpu_ctx) );
}
void ptx_recognizer::add_literal_double( double value )
{
PTX_PARSE_DPRINTF("add_literal_double");
- g_operands.push_back( operand_info(value) );
+ g_operands.push_back( operand_info(value,gpgpu_ctx) );
}
void ptx_recognizer::add_scalar_operand( const char *identifier )
@@ -914,7 +911,7 @@ void ptx_recognizer::add_scalar_operand( const char *identifier )
parse_error( msg.c_str() );
}
}
- g_operands.push_back( operand_info(s) );
+ g_operands.push_back( operand_info(s,gpgpu_ctx) );
}
void ptx_recognizer::add_neg_pred_operand( const char *identifier )
@@ -924,7 +921,7 @@ void ptx_recognizer::add_neg_pred_operand( const char *identifier )
if ( s == NULL ) {
s = g_current_symbol_table->add_variable(identifier,NULL,1,gpgpu_ctx->g_filename,ptx_get_lineno(scanner));
}
- operand_info op(s);
+ operand_info op(s, gpgpu_ctx);
op.set_neg_pred();
g_operands.push_back( op );
}
@@ -937,13 +934,13 @@ void ptx_recognizer::add_address_operand( const char *identifier, int offset )
std::string msg = std::string("operand \"") + identifier + "\" has no declaration.";
parse_error( msg.c_str() );
}
- g_operands.push_back( operand_info(s,offset) );
+ g_operands.push_back( operand_info(s,offset,gpgpu_ctx) );
}
void ptx_recognizer::add_address_operand2( int offset )
{
PTX_PARSE_DPRINTF("add_address_operand");
- g_operands.push_back( operand_info((unsigned)offset) );
+ g_operands.push_back( operand_info((unsigned)offset,gpgpu_ctx) );
}
void ptx_recognizer::add_array_initializer()
diff --git a/src/cuda-sim/ptx_parser.h b/src/cuda-sim/ptx_parser.h
index ef422e5..11a3d20 100644
--- a/src/cuda-sim/ptx_parser.h
+++ b/src/cuda-sim/ptx_parser.h
@@ -31,15 +31,11 @@
#include "../abstract_hardware_model.h"
#include "ptx_ir.h"
-#ifdef __cplusplus
-const class ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber );
-#endif
-
class gpgpu_context;
typedef void * yyscan_t;
class ptx_recognizer {
public:
- ptx_recognizer( gpgpu_context* ctx ) {
+ ptx_recognizer( gpgpu_context* ctx ) : g_return_var(ctx) {
scanner = NULL;
g_size = -1;
g_add_identifier_cached__identifier = NULL;
@@ -107,6 +103,9 @@ class ptx_recognizer {
bool g_debug_ir_generation;
int g_entry_point;
const struct core_config *g_shader_core_config;
+ std::map<std::string,std::map<unsigned,const ptx_instruction*> > g_inst_lookup;
+ // the program intermediate representation...
+ std::map<std::string,symbol_table*> g_sym_name_to_symbol_table;
// backward pointer
class gpgpu_context* gpgpu_ctx;
@@ -177,6 +176,7 @@ class ptx_recognizer {
bool check_for_duplicates( const char *identifier );
void read_parser_environment_variables();
void set_ptx_warp_size(const struct core_config * warp_size);
+ const class ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber );
};
diff --git a/src/cuda-sim/ptx_sim.cc b/src/cuda-sim/ptx_sim.cc
index 1b8831a..949ee66 100644
--- a/src/cuda-sim/ptx_sim.cc
+++ b/src/cuda-sim/ptx_sim.cc
@@ -33,20 +33,20 @@ typedef void * yyscan_t;
#include "ptx.tab.h"
#include "../gpgpu-sim/gpu-sim.h"
#include "../gpgpu-sim/shader.h"
+#include "../../libcuda/gpgpu_context.h"
void feature_not_implemented( const char *f );
-std::set<unsigned long long> g_ptx_cta_info_sm_idx_used;
-unsigned long long g_ptx_cta_info_uid = 1;
-ptx_cta_info::ptx_cta_info( unsigned sm_idx )
+ptx_cta_info::ptx_cta_info( unsigned sm_idx, gpgpu_context* ctx )
{
- assert( g_ptx_cta_info_sm_idx_used.find(sm_idx) == g_ptx_cta_info_sm_idx_used.end() );
- g_ptx_cta_info_sm_idx_used.insert(sm_idx);
+ assert( ctx->func_sim->g_ptx_cta_info_sm_idx_used.find(sm_idx) == ctx->func_sim->g_ptx_cta_info_sm_idx_used.end() );
+ ctx->func_sim->g_ptx_cta_info_sm_idx_used.insert(sm_idx);
m_sm_idx = sm_idx;
- m_uid = g_ptx_cta_info_uid++;
+ m_uid = (ctx->g_ptx_cta_info_uid)++;
m_bar_threads = 0;
+ gpgpu_ctx = ctx;
}
void ptx_cta_info::add_thread( ptx_thread_info *thd )
@@ -166,18 +166,16 @@ void ptx_warp_info::reset_done_threads()
m_done_threads = 0;
}
-unsigned g_ptx_thread_info_uid_next=1;
-unsigned g_ptx_thread_info_delete_count=0;
ptx_thread_info::~ptx_thread_info()
{
- g_ptx_thread_info_delete_count++;
+ m_gpu->gpgpu_ctx->func_sim->g_ptx_thread_info_delete_count++;
}
ptx_thread_info::ptx_thread_info( kernel_info_t &kernel )
: m_kernel(kernel)
{
- m_uid = g_ptx_thread_info_uid_next++;
+ m_uid = kernel.entry()->gpgpu_ctx->func_sim->g_ptx_thread_info_uid_next++;
m_core = NULL;
m_barrier_num = -1;
m_at_barrier = false;
@@ -423,9 +421,9 @@ bool ptx_thread_info::callstack_pop()
assert( !((rv_src != NULL) ^ (rv_dst != NULL)) ); // ensure caller and callee agree on whether there is a return value
// read return value from callee frame
- arg_buffer_t buffer;
+ arg_buffer_t buffer(m_gpu->gpgpu_ctx);
if( rv_src != NULL )
- buffer = copy_arg_to_buffer(this, operand_info(rv_src), rv_dst );
+ buffer = copy_arg_to_buffer(this, operand_info(rv_src, m_gpu->gpgpu_ctx), rv_dst );
m_symbol_table = m_callstack.back().m_symbol_table;
m_NPC = m_callstack.back().m_PC;
@@ -457,9 +455,9 @@ bool ptx_thread_info::callstack_pop_plus()
assert( !((rv_src != NULL) ^ (rv_dst != NULL)) ); // ensure caller and callee agree on whether there is a return value
// read return value from callee frame
- arg_buffer_t buffer;
+ arg_buffer_t buffer(m_gpu->gpgpu_ctx);
if( rv_src != NULL )
- buffer = copy_arg_to_buffer(this, operand_info(rv_src), rv_dst );
+ buffer = copy_arg_to_buffer(this, operand_info(rv_src, m_gpu->gpgpu_ctx), rv_dst );
m_symbol_table = m_callstack.back().m_symbol_table;
m_NPC = m_callstack.back().m_PC;
diff --git a/src/cuda-sim/ptx_sim.h b/src/cuda-sim/ptx_sim.h
index a045a76..c2b3cc8 100644
--- a/src/cuda-sim/ptx_sim.h
+++ b/src/cuda-sim/ptx_sim.h
@@ -164,7 +164,7 @@ class ptx_thread_info;
class ptx_cta_info {
public:
- ptx_cta_info( unsigned sm_idx );
+ ptx_cta_info( unsigned sm_idx, gpgpu_context* ctx );
void add_thread( ptx_thread_info *thd );
unsigned num_threads() const;
void check_cta_thread_status_and_reset();
@@ -176,6 +176,8 @@ public:
void reset_bar_threads();
private:
+ // backward pointer
+ class gpgpu_context* gpgpu_ctx;
unsigned m_bar_threads;
unsigned long long m_uid;
unsigned m_sm_idx;