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-rw-r--r--src/gpgpu-sim/gpu-sim.cc9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index cd38857..ca51c50 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -711,6 +711,15 @@ void shader_core_config::reg_options(class OptionParser *opp) {
"the `gpu_tot_inter_warp_coissue` / `gpu_tot_intra_warp_coissue` "
"stats; only turn this on for quick_tests that grep the raw lines.",
"0");
+ option_parser_register(
+ opp, "-gpgpu_mem_coissue", OPT_BOOL, &gpgpu_mem_coissue,
+ "Enable MEM/LDST co-issue under SIMD lane partitioning. When 0 "
+ "(default), MEM primaries do not participate in co-issue (bit-parity "
+ "with pre-MEM-coissue tree). When 1, global/local-space loads and "
+ "stores from different warps or different splits of the same warp "
+ "may share the LDST unit in one pipe slot; atomics, shared, tex, "
+ "const, barriers, LDGSTS, and BRU spill/fill are still excluded.",
+ "0");
for (unsigned j = 0; j < SPECIALIZED_UNIT_NUM; ++j) {
std::stringstream ss;