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Diffstat (limited to 'src/gpgpu-sim/l2cache.cc')
-rw-r--r--src/gpgpu-sim/l2cache.cc81
1 files changed, 44 insertions, 37 deletions
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index f24a596..f1672f9 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -46,32 +46,35 @@
#include "l2cache_trace.h"
-mem_fetch * partition_mf_allocator::alloc(new_addr_type addr, mem_access_type type, unsigned size, bool wr ) const
+mem_fetch * partition_mf_allocator::alloc(new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const
{
assert( wr );
- mem_access_t access( type, addr, size, wr );
+ mem_access_t access( type, addr, size, wr, m_memory_config->gpgpu_ctx );
mem_fetch *mf = new mem_fetch( access,
NULL,
WRITE_PACKET_SIZE,
-1,
-1,
-1,
- m_memory_config );
+ m_memory_config,
+ cycle);
return mf;
}
memory_partition_unit::memory_partition_unit( unsigned partition_id,
- const struct memory_config *config,
- class memory_stats_t *stats )
-: m_id(partition_id), m_config(config), m_stats(stats), m_arbitration_metadata(config)
+ const memory_config *config,
+ class memory_stats_t *stats,
+ class gpgpu_sim* gpu)
+: m_id(partition_id), m_config(config), m_stats(stats), m_arbitration_metadata(config), m_gpu(gpu)
{
- m_dram = new dram_t(m_id,m_config,m_stats,this);
+ m_dram = new dram_t(m_id,m_config,m_stats,this,gpu);
m_sub_partition = new memory_sub_partition*[m_config->m_n_sub_partition_per_memory_channel];
for (unsigned p = 0; p < m_config->m_n_sub_partition_per_memory_channel; p++) {
unsigned sub_partition_id = m_id * m_config->m_n_sub_partition_per_memory_channel + p;
- m_sub_partition[p] = new memory_sub_partition(sub_partition_id, m_config, stats);
+ m_sub_partition[p] = new memory_sub_partition(sub_partition_id, m_config, stats, gpu);
}
+
}
void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_subpart_id, mem_access_sector_mask_t mask )
@@ -80,7 +83,7 @@ void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_s
std::string mystring =
mask.to_string<char,std::string::traits_type,std::string::allocator_type>();
MEMPART_DPRINTF("Copy Engine Request Received For Address=%llx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str());
- m_sub_partition[p]->force_l2_tag_update(addr,gpu_sim_cycle+gpu_tot_sim_cycle, mask);
+ m_sub_partition[p]->force_l2_tag_update(addr,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle, mask);
}
memory_partition_unit::~memory_partition_unit()
@@ -92,7 +95,7 @@ memory_partition_unit::~memory_partition_unit()
delete[] m_sub_partition;
}
-memory_partition_unit::arbitration_metadata::arbitration_metadata(const struct memory_config *config)
+memory_partition_unit::arbitration_metadata::arbitration_metadata(const memory_config *config)
: m_last_borrower(config->m_n_sub_partition_per_memory_channel - 1),
m_private_credit(config->m_n_sub_partition_per_memory_channel, 0),
m_shared_credit(0)
@@ -208,7 +211,7 @@ void memory_partition_unit::simple_dram_model_cycle()
// pop completed memory request from dram and push it to dram-to-L2 queue
// of the original sub partition
- if (!m_dram_latency_queue.empty() && ( (gpu_sim_cycle+gpu_tot_sim_cycle) >= m_dram_latency_queue.front().ready_cycle )) {
+ if (!m_dram_latency_queue.empty() && ( (m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle) >= m_dram_latency_queue.front().ready_cycle )) {
mem_fetch* mf_return = m_dram_latency_queue.front().req;
if( mf_return->get_access_type() != L1_WRBK_ACC && mf_return->get_access_type() != L2_WRBK_ACC ) {
mf_return->set_reply();
@@ -222,7 +225,7 @@ void memory_partition_unit::simple_dram_model_cycle()
delete mf_return;
} else {
m_sub_partition[dest_spid]->dram_L2_queue_push(mf_return);
- mf_return->set_status(IN_PARTITION_DRAM_TO_L2_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf_return->set_status(IN_PARTITION_DRAM_TO_L2_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_arbitration_metadata.return_credit(dest_spid);
MEMPART_DPRINTF("mem_fetch request %p return from dram to sub partition %d\n", mf_return, dest_spid);
}
@@ -252,7 +255,7 @@ void memory_partition_unit::simple_dram_model_cycle()
MEMPART_DPRINTF("Issue mem_fetch request %p from sub partition %d to dram\n", mf, spid);
dram_delay_t d;
d.req = mf;
- d.ready_cycle = gpu_sim_cycle+gpu_tot_sim_cycle + m_config->dram_latency;
+ d.ready_cycle = m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle + m_config->dram_latency;
m_dram_latency_queue.push_back(d);
mf->set_status(IN_PARTITION_DRAM_LATENCY_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
m_arbitration_metadata.borrow_credit(spid);
@@ -278,7 +281,7 @@ void memory_partition_unit::dram_cycle()
delete mf_return;
} else {
m_sub_partition[dest_spid]->dram_L2_queue_push(mf_return);
- mf_return->set_status(IN_PARTITION_DRAM_TO_L2_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf_return->set_status(IN_PARTITION_DRAM_TO_L2_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_arbitration_metadata.return_credit(dest_spid);
MEMPART_DPRINTF("mem_fetch request %p return from dram to sub partition %d\n", mf_return, dest_spid);
}
@@ -307,9 +310,9 @@ void memory_partition_unit::dram_cycle()
MEMPART_DPRINTF("Issue mem_fetch request %p from sub partition %d to dram\n", mf, spid);
dram_delay_t d;
d.req = mf;
- d.ready_cycle = gpu_sim_cycle+gpu_tot_sim_cycle + m_config->dram_latency;
+ d.ready_cycle = m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle + m_config->dram_latency;
m_dram_latency_queue.push_back(d);
- mf->set_status(IN_PARTITION_DRAM_LATENCY_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_DRAM_LATENCY_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_arbitration_metadata.borrow_credit(spid);
break; // the DRAM should only accept one request per cycle
}
@@ -317,11 +320,11 @@ void memory_partition_unit::dram_cycle()
//}
// DRAM latency queue
- if( !m_dram_latency_queue.empty() && ( (gpu_sim_cycle+gpu_tot_sim_cycle) >= m_dram_latency_queue.front().ready_cycle ) && !m_dram->full(m_dram_latency_queue.front().req->is_write()) ) {
- mem_fetch* mf = m_dram_latency_queue.front().req;
- m_dram_latency_queue.pop_front();
- m_dram->push(mf);
- }
+ if( !m_dram_latency_queue.empty() && ( (m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle) >= m_dram_latency_queue.front().ready_cycle ) && !m_dram->full(m_dram_latency_queue.front().req->is_write()) ) {
+ mem_fetch* mf = m_dram_latency_queue.front().req;
+ m_dram_latency_queue.pop_front();
+ m_dram->push(mf);
+ }
}
void memory_partition_unit::set_done( mem_fetch *mf )
@@ -368,12 +371,14 @@ void memory_partition_unit::print( FILE *fp ) const
}
memory_sub_partition::memory_sub_partition( unsigned sub_partition_id,
- const struct memory_config *config,
- class memory_stats_t *stats )
+ const memory_config *config,
+ class memory_stats_t *stats,
+ class gpgpu_sim* gpu)
{
m_id = sub_partition_id;
m_config=config;
m_stats=stats;
+ m_gpu = gpu;
m_memcpy_cycle_offset = 0;
assert(m_id < m_config->m_n_mem_sub_partition);
@@ -384,7 +389,7 @@ memory_sub_partition::memory_sub_partition( unsigned sub_partition_id,
m_mf_allocator = new partition_mf_allocator(config);
if(!m_config->m_L2_config.disabled())
- m_L2cache = new l2_cache(L2c_name,m_config->m_L2_config,-1,-1,m_L2interface,m_mf_allocator,IN_PARTITION_L2_MISS_QUEUE);
+ m_L2cache = new l2_cache(L2c_name,m_config->m_L2_config,-1,-1,m_L2interface,m_mf_allocator,IN_PARTITION_L2_MISS_QUEUE, gpu);
unsigned int icnt_L2;
unsigned int L2_dram;
@@ -416,7 +421,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
mem_fetch *mf = m_L2cache->next_access();
if(mf->get_access_type() != L2_WR_ALLOC_R){ // Don't pass write allocate read request back to upper level cache
mf->set_reply();
- mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_icnt_queue->push(mf);
}else{
if(m_config->m_L2_config.m_write_alloc_policy == FETCH_ON_WRITE)
@@ -424,7 +429,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
mem_fetch* original_wr_mf = mf->get_original_wr_mf();
assert(original_wr_mf);
original_wr_mf->set_reply();
- original_wr_mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ original_wr_mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_icnt_queue->push(original_wr_mf);
}
m_request_tracker.erase(mf);
@@ -438,13 +443,13 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
mem_fetch *mf = m_dram_L2_queue->top();
if ( !m_config->m_L2_config.disabled() && m_L2cache->waiting_for_fill(mf) ) {
if (m_L2cache->fill_port_free()) {
- mf->set_status(IN_PARTITION_L2_FILL_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
- m_L2cache->fill(mf,gpu_sim_cycle+gpu_tot_sim_cycle+m_memcpy_cycle_offset);
+ mf->set_status(IN_PARTITION_L2_FILL_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
+ m_L2cache->fill(mf,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle+m_memcpy_cycle_offset);
m_dram_L2_queue->pop();
}
} else if ( !m_L2_icnt_queue->full() ) {
if(mf->is_write() && mf->get_type() == WRITE_ACK)
- mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_icnt_queue->push(mf);
m_dram_L2_queue->pop();
}
@@ -465,7 +470,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
bool port_free = m_L2cache->data_port_free();
if ( !output_full && port_free ) {
std::list<cache_event> events;
- enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle+m_memcpy_cycle_offset,events);
+ enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle+m_memcpy_cycle_offset,events);
bool write_sent = was_write_sent(events);
bool read_sent = was_read_sent(events);
MEM_SUBPART_DPRINTF("Probing L2 cache Address=%llx, status=%u\n", mf->get_addr(), status);
@@ -479,7 +484,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
delete mf;
} else {
mf->set_reply();
- mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_icnt_queue->push(mf);
}
m_icnt_L2_queue->pop();
@@ -490,7 +495,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
} else if ( status != RESERVATION_FAIL ) {
if(mf->is_write() && (m_config->m_L2_config.m_write_alloc_policy == FETCH_ON_WRITE || m_config->m_L2_config.m_write_alloc_policy == LAZY_FETCH_ON_READ) && !was_writeallocate_sent(events)) {
mf->set_reply();
- mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_L2_TO_ICNT_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_icnt_queue->push(mf);
}
// L2 cache accepted request
@@ -503,7 +508,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
}
} else {
// L2 is disabled or non-texture access to texture-only L2
- mf->set_status(IN_PARTITION_L2_TO_DRAM_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_L2_TO_DRAM_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
m_L2_dram_queue->push(mf);
m_icnt_L2_queue->pop();
}
@@ -514,7 +519,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
mem_fetch* mf = m_rop.front().req;
m_rop.pop();
m_icnt_L2_queue->push(mf);
- mf->set_status(IN_PARTITION_ICNT_TO_L2_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ mf->set_status(IN_PARTITION_ICNT_TO_L2_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
}
}
@@ -694,7 +699,8 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
mf->is_write(),
mf->get_access_warp_mask(),
mf->get_access_byte_mask() & byte_sector_mask,
- std::bitset<SECTOR_CHUNCK_SIZE>().set(j));
+ std::bitset<SECTOR_CHUNCK_SIZE>().set(j),
+ m_gpu->gpgpu_ctx);
mem_fetch *n_mf = new mem_fetch( *ma,
NULL,
@@ -703,6 +709,7 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
mf->get_sid(),
mf->get_tpc(),
mf->get_mem_config(),
+ m_gpu->gpu_tot_sim_cycle+m_gpu->gpu_sim_cycle,
mf);
result.push_back(n_mf);
@@ -732,13 +739,13 @@ void memory_sub_partition::push( mem_fetch* m_req, unsigned long long cycle )
m_request_tracker.insert(req);
if( req->istexture() ) {
m_icnt_L2_queue->push(req);
- req->set_status(IN_PARTITION_ICNT_TO_L2_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
+ req->set_status(IN_PARTITION_ICNT_TO_L2_QUEUE,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
} else {
rop_delay_t r;
r.req = req;
r.ready_cycle = cycle + m_config->rop_latency;
m_rop.push(r);
- req->set_status(IN_PARTITION_ROP_DELAY,gpu_sim_cycle+gpu_tot_sim_cycle);
+ req->set_status(IN_PARTITION_ROP_DELAY,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle);
}
}
}
generated by cgit v1.3 (git 2.53.0) at 2026-07-10 23:27:54 +0000