diff options
Diffstat (limited to 'src/gpgpu-sim/scoreboard.h')
| -rw-r--r-- | src/gpgpu-sim/scoreboard.h | 50 |
1 files changed, 48 insertions, 2 deletions
diff --git a/src/gpgpu-sim/scoreboard.h b/src/gpgpu-sim/scoreboard.h index 3dbb1ce..660587e 100644 --- a/src/gpgpu-sim/scoreboard.h +++ b/src/gpgpu-sim/scoreboard.h @@ -41,7 +41,12 @@ class Scoreboard { public: - Scoreboard(unsigned sid, unsigned n_warps, class gpgpu_t *gpu); + // mode: 0 = legacy (primary + secondary tables), 1 = mask-aware, + // 2 = slot-pinned. See scoreboard_redesign_plan.md. + Scoreboard(unsigned sid, unsigned n_warps, class gpgpu_t *gpu, + unsigned mode = 0); + + unsigned mode() const { return m_mode; } void reserveRegisters(const warp_inst_t *inst); void releaseRegisters(const warp_inst_t *inst); @@ -52,12 +57,35 @@ class Scoreboard { void printContents() const; const bool islongop(unsigned warp_id, unsigned regnum); - // Secondary scoreboard for intra-warp co-issue (split-level tracking) + // Secondary scoreboard for intra-warp co-issue (split-level tracking). + // Mode 0 (legacy) only — bypassed under modes 1 and 2. void reserveRegisterSecondary(unsigned wid, unsigned regnum); void releaseRegisterSecondary(unsigned wid, unsigned regnum); bool checkCollisionSecondary(unsigned wid, const inst_t *inst) const; void clearSecondary(unsigned wid); + // Mode 1: mask-aware single scoreboard. + // Each reservation entry tracks (reg, active_mask, ref_count). Hazard + // checks return true iff any of the inst's read/written regs has an + // entry whose mask overlaps the candidate's active_mask. See + // for_claude/docs/scoreboard_redesign_plan.md for design. + void reserveRegisterMask(unsigned wid, unsigned reg, + const active_mask_t &mask); + void releaseRegisterMask(unsigned wid, unsigned reg, + const active_mask_t &mask); + bool checkCollisionMask(unsigned wid, const inst_t *inst, + const active_mask_t &mask) const; + // Mask-agnostic helper: any in-flight writes for this warp under the + // active scoreboard table. In mode 1 this checks mask_reg_table; in + // mode 0 it falls through to legacy reg_table emptiness. + bool pendingWritesAny(unsigned wid) const; + + // Per-set release dispatcher used at writeback. In mode 0, picks + // primary vs secondary release based on `is_intra_legacy`. In mode 1, + // releases (reg, mask) from mask_reg_table; `is_intra_legacy` ignored. + void releaseSetReg(unsigned wid, unsigned reg, const active_mask_t &mask, + bool is_intra_legacy); + public: // Accounting / leak-detection (called from gpu-sim end-of-run dump). // Aggregates reserve/release counts, reservation-duration histogram, @@ -74,6 +102,7 @@ class Scoreboard { int get_sid() const { return m_sid; } unsigned m_sid; + unsigned m_mode; // 0=legacy, 1=mask-aware, 2=slot-pinned // keeps track of pending writes to registers // indexed by warp id, reg_id => pending write count @@ -84,6 +113,23 @@ class Scoreboard { // Secondary path register tracking (for I-Buffer half 1, intra-warp co-issue) std::vector<std::set<unsigned> > sec_reg_table; + // Mode 1: per-warp list of mask-aware reservations. + struct mask_resv { + unsigned reg; + active_mask_t mask; + unsigned ref_count; + unsigned long long resv_cycle; + }; + std::vector<std::vector<mask_resv> > mask_reg_table; + + // Mode 1 accounting (used by dumpAccounting + dump_warp_state for leak + // detection on the deadlock path). + unsigned long long m_mask_reserve_inserts; // new entry pushes + unsigned long long m_mask_reserve_inc_refcount; // ref_count++ on existing + unsigned long long m_mask_release_match; // found and decremented + unsigned long long m_mask_release_nomatch; // no matching entry + unsigned long long m_mask_release_erase; // ref_count hit 0 + erased + class gpgpu_t *m_gpu; // ---- Accounting (per-shader, scalar; cheap to update) ---- |