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-rw-r--r--src/gpgpu-sim/mem_fetch.cc27
-rw-r--r--src/gpgpu-sim/mem_fetch.h34
-rw-r--r--src/gpgpu-sim/mem_fetch_status.tup94
3 files changed, 108 insertions, 47 deletions
diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc
index abf1d4e..a085cd9 100644
--- a/src/gpgpu-sim/mem_fetch.cc
+++ b/src/gpgpu-sim/mem_fetch.cc
@@ -66,26 +66,13 @@ mem_fetch::~mem_fetch()
m_status = MEM_FETCH_DELETED;
}
-static const char* Status_str[] = {
-"INITIALIZED",
-"IN_ICNT_TO_MEM",
-"IN_PARTITION_ROP_DELAY",
-"IN_PARTITION_ICNT_TO_L2_QUEUE",
-"IN_PARTITION_L2_TO_DRAM_QUEUE",
-"IN_PARTITION_MC_INTERFACE_QUEUE",
-"IN_PARTITION_MC_INPUT_QUEUE",
-"IN_PARTITION_MC_BANK_ARB_QUEUE",
-"IN_PARTITION_DRAM",
-"IN_PARTITION_MC_RETURNQ",
-"IN_PARTITION_DRAM_TO_L2_QUEUE",
-"IN_PARTITION_L2_FILL_QUEUE",
-"IN_PARTITION_L2_TO_ICNT_QUEUE",
-"IN_ICNT_TO_SHADER",
-"IN_CLUSTER_TO_SHADER_QUEUE",
-"IN_SHADER_LDST_RESPONSE_FIFO",
-"IN_SHADER_FETCHED",
-"MEM_FETCH_DELETED"
-};
+#define MF_TUP_BEGIN(X) static const char* Status_str[] = {
+#define MF_TUP(X) #X
+#define MF_TUP_END(X) };
+#include "mem_fetch_status.tup"
+#undef MF_TUP_BEGIN
+#undef MF_TUP
+#undef MF_TUP_END
void mem_fetch::print( FILE *fp, bool print_inst ) const
{
diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h
index cc3147c..a4e8499 100644
--- a/src/gpgpu-sim/mem_fetch.h
+++ b/src/gpgpu-sim/mem_fetch.h
@@ -39,33 +39,13 @@ enum mf_type {
WRITE_ACK
};
-enum mem_fetch_status {
- MEM_FETCH_INITIALIZED = 0,
- IN_L1I_MISS_QUEUE,
- IN_L1D_MISS_QUEUE,
- IN_L1T_MISS_QUEUE,
- IN_L1C_MISS_QUEUE,
- IN_ICNT_TO_MEM,
- IN_PARTITION_ROP_DELAY,
- IN_PARTITION_ICNT_TO_L2_QUEUE,
- IN_PARTITION_L2_TO_DRAM_QUEUE,
- IN_PARTITION_L2_MISS_QUEUE,
- IN_PARTITION_MC_INTERFACE_QUEUE,
- IN_PARTITION_MC_INPUT_QUEUE,
- IN_PARTITION_MC_BANK_ARB_QUEUE,
- IN_PARTITION_DRAM,
- IN_PARTITION_MC_RETURNQ,
- IN_PARTITION_DRAM_TO_L2_QUEUE,
- IN_PARTITION_L2_FILL_QUEUE,
- IN_PARTITION_L2_TO_ICNT_QUEUE,
- IN_ICNT_TO_SHADER,
- IN_CLUSTER_TO_SHADER_QUEUE,
- IN_SHADER_LDST_RESPONSE_FIFO,
- IN_SHADER_FETCHED,
- IN_SHADER_L1T_ROB,
- MEM_FETCH_DELETED,
- NUM_MEM_REQ_STAT
-};
+#define MF_TUP_BEGIN(X) enum X {
+#define MF_TUP(X) X
+#define MF_TUP_END(X) };
+#include "mem_fetch_status.tup"
+#undef MF_TUP_BEGIN
+#undef MF_TUP
+#undef MF_TUP_END
class mem_fetch {
public:
diff --git a/src/gpgpu-sim/mem_fetch_status.tup b/src/gpgpu-sim/mem_fetch_status.tup
new file mode 100644
index 0000000..df8e375
--- /dev/null
+++ b/src/gpgpu-sim/mem_fetch_status.tup
@@ -0,0 +1,94 @@
+/*
+ * mem_fetch_status.tup
+ *
+ * Copyright (c) 2009 by Tor M. Aamodt, Tim Rogers and
+ * University of British Columbia
+ * Vancouver, BC V6T 1Z4
+ * All Rights Reserved.
+ *
+ * THIS IS A LEGAL DOCUMENT BY DOWNLOADING GPGPU-SIM, YOU ARE AGREEING TO THESE
+ * TERMS AND CONDITIONS.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * NOTE: The files libcuda/cuda_runtime_api.c and src/cuda-sim/cuda-math.h
+ * are derived from the CUDA Toolset available from http://www.nvidia.com/cuda
+ * (property of NVIDIA). The files benchmarks/BlackScholes/ and
+ * benchmarks/template/ are derived from the CUDA SDK available from
+ * http://www.nvidia.com/cuda (also property of NVIDIA). The files from
+ * src/intersim/ are derived from Booksim (a simulator provided with the
+ * textbook "Principles and Practices of Interconnection Networks" available
+ * from http://cva.stanford.edu/books/ppin/). As such, those files are bound by
+ * the corresponding legal terms and conditions set forth separately (original
+ * copyright notices are left in files from these sources and where we have
+ * modified a file our copyright notice appears before the original copyright
+ * notice).
+ *
+ * Using this version of GPGPU-Sim requires a complete installation of CUDA
+ * which is distributed seperately by NVIDIA under separate terms and
+ * conditions. To use this version of GPGPU-Sim with OpenCL requires a
+ * recent version of NVIDIA's drivers which support OpenCL.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the University of British Columbia nor the names of
+ * its contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * 4. This version of GPGPU-SIM is distributed freely for non-commercial use only.
+ *
+ * 5. No nonprofit user may place any restrictions on the use of this software,
+ * including as modified by the user, by any other authorized user.
+ *
+ * 6. GPGPU-SIM was developed primarily by Tor M. Aamodt, Wilson W. L. Fung,
+ * Ali Bakhoda, George L. Yuan, at the University of British Columbia,
+ * Vancouver, BC V6T 1Z4
+ */
+
+MF_TUP_BEGIN( mem_fetch_status )
+ MF_TUP( MEM_FETCH_INITIALIZED ),
+ MF_TUP( IN_L1I_MISS_QUEUE ),
+ MF_TUP( IN_L1D_MISS_QUEUE ),
+ MF_TUP( IN_L1T_MISS_QUEUE ),
+ MF_TUP( IN_L1C_MISS_QUEUE ),
+ MF_TUP( IN_TLB_MISS_QUEUE ),
+ MF_TUP( IN_VM_MANAGER_QUEUE ),
+ MF_TUP( IN_ICNT_TO_MEM ),
+ MF_TUP( IN_PARTITION_ROP_DELAY ),
+ MF_TUP( IN_PARTITION_ICNT_TO_L2_QUEUE ),
+ MF_TUP( IN_PARTITION_L2_TO_DRAM_QUEUE ),
+ MF_TUP( IN_PARTITION_L2_MISS_QUEUE ),
+ MF_TUP( IN_PARTITION_MC_INTERFACE_QUEUE ),
+ MF_TUP( IN_PARTITION_MC_INPUT_QUEUE ),
+ MF_TUP( IN_PARTITION_MC_BANK_ARB_QUEUE ),
+ MF_TUP( IN_PARTITION_DRAM ),
+ MF_TUP( IN_PARTITION_MC_RETURNQ ),
+ MF_TUP( IN_PARTITION_DRAM_TO_L2_QUEUE ),
+ MF_TUP( IN_PARTITION_L2_FILL_QUEUE ),
+ MF_TUP( IN_PARTITION_L2_TO_ICNT_QUEUE ),
+ MF_TUP( IN_ICNT_TO_SHADER ),
+ MF_TUP( IN_CLUSTER_TO_SHADER_QUEUE ),
+ MF_TUP( IN_SHADER_LDST_RESPONSE_FIFO ),
+ MF_TUP( IN_SHADER_FETCHED ),
+ MF_TUP( IN_SHADER_L1T_ROB ),
+ MF_TUP( MEM_FETCH_DELETED ),
+ MF_TUP( NUM_MEM_REQ_STAT )
+MF_TUP_END( mem_fetch_status ) \ No newline at end of file