diff options
Diffstat (limited to 'src/gpgpu-sim')
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 31 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.h | 2 |
3 files changed, 30 insertions, 6 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 2de9a4f..5fa487a 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -224,6 +224,9 @@ void shader_core_config::reg_options(class OptionParser * opp) "per-shader L1 data cache config " " {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq> | none}", "none" ); + option_parser_register(opp, "-gmem_skip_L1D", OPT_BOOL, &gmem_skip_L1D, + "global memory access skip L1D cache (implements -Xptxas -dlcm=cg, default=no skip)", + "0"); option_parser_register(opp, "-gpgpu_perfect_mem", OPT_BOOL, &gpgpu_perfect_mem, "enable perfect memory mode (no cache miss)", diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 5bda78c..87e59ed 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -1371,7 +1371,16 @@ bool ldst_unit::memory_cycle( warp_inst_t &inst, mem_stage_stall_type &stall_rea const mem_access_t &access = inst.accessq_back(); unsigned size = access.get_size(); - if( CACHE_GLOBAL == inst.cache_op || (m_L1D == NULL) ) { + bool bypassL1D = false; + if ( CACHE_GLOBAL == inst.cache_op || (m_L1D == NULL) ) { + bypassL1D = true; + } else if (inst.space.is_global()) { // global memory access + // skip L1 cache if the option is enabled + if (m_core->get_config()->gmem_skip_L1D) + bypassL1D = true; + } + + if( bypassL1D ) { // bypass L1 cache if( m_icnt->full(size, inst.is_store() || inst.isatomic()) ) { stall_cond = ICNT_RC_FAIL; @@ -1775,13 +1784,23 @@ void ldst_unit::cycle() delete mf; } else { assert( !mf->get_is_write() ); // L1 cache is write evict, allocate line on load miss only - if( mf->get_inst().cache_op != CACHE_GLOBAL && m_L1D ) { + + bool bypassL1D = false; + if ( CACHE_GLOBAL == mf->get_inst().cache_op || (m_L1D == NULL) ) { + bypassL1D = true; + } else if (mf->get_access_type() == GLOBAL_ACC_R || mf->get_access_type() == GLOBAL_ACC_W) { // global memory access + if (m_core->get_config()->gmem_skip_L1D) + bypassL1D = true; + } + if( bypassL1D ) { + if ( m_next_global == NULL ) { + mf->set_status(IN_SHADER_FETCHED,gpu_sim_cycle+gpu_tot_sim_cycle); + m_response_fifo.pop_front(); + m_next_global = mf; + } + } else { m_L1D->fill(mf,gpu_sim_cycle+gpu_tot_sim_cycle); m_response_fifo.pop_front(); - } else if( m_next_global == NULL ) { - mf->set_status(IN_SHADER_FETCHED,gpu_sim_cycle+gpu_tot_sim_cycle); - m_response_fifo.pop_front(); - m_next_global = mf; } } } diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 7c99ac5..f141019 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1272,6 +1272,8 @@ struct shader_core_config : public core_config mutable cache_config m_L1C_config; mutable cache_config m_L1D_config; + bool gmem_skip_L1D; // on = global memory access always skip the L1 cache + bool gpgpu_dwf_reg_bankconflict; int gpgpu_num_sched_per_core; |