diff options
Diffstat (limited to 'src/gpuwattch/core.cc')
| -rw-r--r-- | src/gpuwattch/core.cc | 40 |
1 files changed, 24 insertions, 16 deletions
diff --git a/src/gpuwattch/core.cc b/src/gpuwattch/core.cc index f2376fe..77a5565 100644 --- a/src/gpuwattch/core.cc +++ b/src/gpuwattch/core.cc @@ -804,7 +804,7 @@ SchedulerU::SchedulerU(ParseXML* XML_interface, int ithCore_, // can know which reg/RRAT to update // data = // int(ceil((robExtra+coredynp.pc_width - //+ coredynp.instruction_length + //+ coredynp.instruction_length //+ 2*coredynp.phy_ireg_width)/8.0)); data = int(ceil( (robExtra + coredynp.pc_width + coredynp.phy_ireg_width) / 8.0)); @@ -812,7 +812,7 @@ SchedulerU::SchedulerU(ParseXML* XML_interface, int ithCore_, // in RS based OOO, ROB also contains value of destination reg // data = // int(ceil((robExtra+coredynp.pc_width - //+ coredynp.instruction_length + //+ coredynp.instruction_length //+ 2*coredynp.phy_ireg_width + coredynp.fp_data_width)/8.0)); data = int(ceil((robExtra + coredynp.pc_width + coredynp.phy_ireg_width + coredynp.fp_data_width) / @@ -2400,18 +2400,19 @@ RENAMINGU::RENAMINGU(ParseXML* XML_interface, int ithCore_, // int(ceil(coredynp.phy_ireg_width/8.0)*coredynp.num_IRF_entry); // out_w = data; interface_ip.is_cache //= false; interface_ip.pure_cam = - //false; interface_ip.pure_ram = true; interface_ip.line_sz - //= data; interface_ip.cache_sz = - // data*coredynp.globalCheckpoint; interface_ip.assoc = 1; + // false; interface_ip.pure_ram = true; + // interface_ip.line_sz = data; interface_ip.cache_sz + // = data*coredynp.globalCheckpoint; interface_ip.assoc = 1; // interface_ip.nbanks = 1; // interface_ip.out_w = // out_w*8; interface_ip.access_mode = 0; // interface_ip.throughput = 1.0/clockRate; - //interface_ip.latency = 1.0/clockRate; interface_ip.obj_func_dyn_energy - //= 0; interface_ip.obj_func_dyn_power = 0; - // interface_ip.obj_func_leak_power = 0; - // interface_ip.obj_func_cycle_t = 1; - // interface_ip.num_rw_ports = 1;//the extra one + // interface_ip.latency = 1.0/clockRate; + // interface_ip.obj_func_dyn_energy = 0; + // interface_ip.obj_func_dyn_power = 0; + // interface_ip.obj_func_leak_power = 0; + //interface_ip.obj_func_cycle_t = 1; + //interface_ip.num_rw_ports = 1;//the extra one // port is for GCs interface_ip.num_rd_ports = // 2*coredynp.decodeW; interface_ip.num_wr_ports = // coredynp.decodeW; @@ -6382,7 +6383,9 @@ void Core::displayEnergy(uint32_t indent, int plevel, bool is_tdp) { // cout // << indent_str_next << "Peak Dynamic = " << // undiffCore->power.readOp.dynamic*clockRate << " W" << endl; - //// cout << indent_str_next << "Subthreshold Leakage = + //// cout << indent_str_next << "Subthreshold + ///Leakage + ///= ///" ///<< undiffCore->power.readOp.leakage <<" W" << endl; // cout << indent_str_next << "Subthreshold Leakage @@ -6391,10 +6394,14 @@ void Core::displayEnergy(uint32_t indent, int plevel, bool is_tdp) { // << //(long_channel? // undiffCore->power.readOp.longer_channel_leakage:undiffCore->power.readOp.leakage) - //<< " W" << endl; cout << indent_str_next << "Gate Leakage = + //<< " W" << endl; cout << indent_str_next << "Gate + //Leakage + //= //" //<< undiffCore->power.readOp.gate_leakage << " W" << endl; - // // cout << indent_str_next << "Runtime Dynamic = + // // cout << indent_str_next << "Runtime + //Dynamic + //= //" //<< undiffCore->rt_power.readOp.dynamic/executionTime << " W" << endl; // cout @@ -6411,11 +6418,12 @@ void Core::displayEnergy(uint32_t indent, int plevel, bool is_tdp) { << endl; } else { - // cout << indent_str_next << "Instruction Fetch Unit Peak Dynamic + // cout << indent_str_next << "Instruction Fetch Unit Peak + // Dynamic //= //" //<< ifu->rt_power.readOp.dynamic*clockRate << " W" << endl; - //cout + // cout //<< indent_str_next << "Instruction Fetch Unit Subthreshold Leakage = " // << ifu->rt_power.readOp.leakage <<" W" << endl; cout << // indent_str_next << "Instruction Fetch Unit Gate Leakage = " << @@ -6430,7 +6438,7 @@ void Core::displayEnergy(uint32_t indent, int plevel, bool is_tdp) { // << "Load Store Unit Gate Leakage = " << // lsu->rt_power.readOp.gate_leakage //<< " W" << endl; cout << indent_str_next << "Memory Management - //Unit Peak Dynamic = " << mmu->rt_power.readOp.dynamic*clockRate << " W" + // Unit Peak Dynamic = " << mmu->rt_power.readOp.dynamic*clockRate << " W" // << // endl; cout << indent_str_next << "Memory Management Unit // Subthreshold Leakage = " << mmu->rt_power.readOp.leakage << " W" << |