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-rw-r--r--src/intersim/examples/single20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/intersim/examples/single b/src/intersim/examples/single
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+++ b/src/intersim/examples/single
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+// Topology
+
+topology = single;
+in_ports = 8;
+out_ports = 8;
+
+// Routing
+
+routing_function = single;
+
+// Flow control
+
+vc_allocator = islip;
+sw_allocator = islip;
+alloc_iters = 2;
+
+num_vcs = 8;
+vc_buf_size = 1000;
+
+wait_for_tail_credit = 0; \ No newline at end of file