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Diffstat (limited to 'src/intersim2/.svn/pristine/9b')
| -rw-r--r-- | src/intersim2/.svn/pristine/9b/9b149c35e1f088a947ef877a58c79300dd5b074e.svn-base | 103 |
1 files changed, 0 insertions, 103 deletions
diff --git a/src/intersim2/.svn/pristine/9b/9b149c35e1f088a947ef877a58c79300dd5b074e.svn-base b/src/intersim2/.svn/pristine/9b/9b149c35e1f088a947ef877a58c79300dd5b074e.svn-base deleted file mode 100644 index 8409322..0000000 --- a/src/intersim2/.svn/pristine/9b/9b149c35e1f088a947ef877a58c79300dd5b074e.svn-base +++ /dev/null @@ -1,103 +0,0 @@ -// $Id$ - -/* - Copyright (c) 2007-2012, Trustees of The Leland Stanford Junior University - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this - list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR - ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -// ---------------------------------------------------------------------- -// -// SeparableInputFirstAllocator: Separable Input-First Allocator -// -// ---------------------------------------------------------------------- - -#include "separable_input_first.hpp" - -#include "booksim.hpp" -#include "arbiter.hpp" - -#include <vector> -#include <iostream> -#include <cstring> - -SeparableInputFirstAllocator:: -SeparableInputFirstAllocator( Module* parent, const string& name, int inputs, - int outputs, const string& arb_type ) - : SeparableAllocator( parent, name, inputs, outputs, arb_type ) -{} - -void SeparableInputFirstAllocator::Allocate() { - - set<int>::const_iterator port_iter = _in_occ.begin(); - while(port_iter != _in_occ.end()) { - - const int & input = *port_iter; - - // add requests to the input arbiter - - map<int, sRequest>::const_iterator req_iter = _in_req[input].begin(); - while(req_iter != _in_req[input].end()) { - - const sRequest & req = req_iter->second; - - _input_arb[input]->AddRequest(req.port, req.label, req.in_pri); - - ++req_iter; - } - - // Execute the input arbiters and propagate the grants to the - // output arbiters. - - int label = -1; - const int output = _input_arb[input]->Arbitrate(&label, NULL); - assert(output > -1); - - const sRequest & req = _out_req[output][input]; - assert((req.port == input) && (req.label == label)); - - _output_arb[output]->AddRequest(req.port, req.label, req.out_pri); - - ++port_iter; - } - - port_iter = _out_occ.begin(); - while(port_iter != _out_occ.end()) { - - const int & output = *port_iter; - - // Execute the output arbiters. - - const int input = _output_arb[output]->Arbitrate(NULL, NULL); - - if(input > -1) { - assert((_inmatch[input] == -1) && (_outmatch[output] == -1)); - - _inmatch[input] = output ; - _outmatch[output] = input ; - _input_arb[input]->UpdateState() ; - _output_arb[output]->UpdateState() ; - } - - ++port_iter; - } -} |
