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-rw-r--r--src/gpgpu-sim/gpu-sim.cc113
-rw-r--r--src/gpgpu-sim/shader.cc79
-rw-r--r--src/gpgpu-sim/shader.h23
3 files changed, 186 insertions, 29 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 126e007..8a5d581 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -367,6 +367,10 @@ void shader_core_config::reg_options(class OptionParser * opp)
"For complete list of prioritization values see shader.h enum scheduler_prioritization_type"
"Default: gto",
"gto");
+
+ option_parser_register(opp, "-gpgpu_concurrent_kernel_sm", OPT_BOOL, &gpgpu_concurrent_kernel_sm,
+ "Support concurrent kernels on a SM (default = enabled)",
+ "1");
}
void gpgpu_sim_config::reg_options(option_parser_t opp)
@@ -1075,7 +1079,98 @@ void shader_core_ctx::mem_instruction_stats(const warp_inst_t &inst)
abort();
}
}
+//Jin: concurrent kernels on one SM
+bool shader_core_ctx::can_issue_1block(kernel_info_t & kernel) {
+
+ if(m_config->max_cta(kernel) < 1)
+ return false;
+
+ return occupy_shader_resource_1block(kernel, false);
+}
+
+int shader_core_ctx::find_available_hwtid(unsigned int cta_size) {
+
+ unsigned int step;
+ for(step = 0; step < m_config->n_thread_per_shader;
+ step += cta_size) {
+
+ unsigned int hw_tid;
+ for(hw_tid = step; hw_tid < step + cta_size;
+ hw_tid++) {
+ if(m_active_threads.test(hw_tid))
+ break;
+ }
+ if(hw_tid == step + cta_size) //consecutive non-active
+ break;
+ }
+ if(step >= m_config->n_thread_per_shader) //didn't find
+ return -1;
+ else
+ return step;
+}
+
+bool shader_core_ctx::occupy_shader_resource_1block(kernel_info_t & k, bool occupy) {
+ unsigned threads_per_cta = k.threads_per_cta();
+ const class function_info *kernel = k.entry();
+ unsigned int padded_cta_size = threads_per_cta;
+ unsigned int warp_size = m_config->warp_size;
+ if (padded_cta_size%warp_size)
+ padded_cta_size = ((padded_cta_size/warp_size)+1)*(warp_size);
+
+ if(m_occupied_n_threads + padded_cta_size > m_config->n_thread_per_shader)
+ return false;
+
+ if(find_available_hwtid(padded_cta_size) == -1)
+ return false;
+
+ const struct gpgpu_ptx_sim_kernel_info *kernel_info = ptx_sim_kernel_info(kernel);
+
+ if(m_occupied_shmem + kernel_info->smem > m_config->gpgpu_shmem_size)
+ return false;
+
+ unsigned int used_regs = padded_cta_size * ((kernel_info->regs+3)&~3);
+ if(m_occupied_regs + used_regs > m_config->gpgpu_shader_registers)
+ return false;
+
+ if(m_occupied_ctas +1 > m_config->max_cta_per_core)
+ return false;
+
+ if(occupy) {
+ m_occupied_n_threads += padded_cta_size;
+ m_occupied_shmem += kernel_info->smem;
+ m_occupied_regs += (padded_cta_size * ((kernel_info->regs+3)&~3));
+ m_occupied_ctas++;
+
+ printf("GPGPU-Sim uArch: Shader %d occupied %d threads, %d shared mem, %d registers, %d ctas\n",
+ m_sid, m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, m_occupied_ctas);
+ }
+
+ return true;
+}
+void shader_core_ctx::release_shader_resource_1block(kernel_info_t & k) {
+ unsigned threads_per_cta = k.threads_per_cta();
+ const class function_info *kernel = k.entry();
+ unsigned int padded_cta_size = threads_per_cta;
+ unsigned int warp_size = m_config->warp_size;
+ if (padded_cta_size%warp_size)
+ padded_cta_size = ((padded_cta_size/warp_size)+1)*(warp_size);
+
+ assert(m_occupied_n_threads >= padded_cta_size);
+ m_occupied_n_threads -= padded_cta_size;
+
+ const struct gpgpu_ptx_sim_kernel_info *kernel_info = ptx_sim_kernel_info(kernel);
+
+ assert(m_occupied_shmem >= (unsigned int)kernel_info->smem);
+ m_occupied_shmem -= kernel_info->smem;
+
+ unsigned int used_regs = padded_cta_size * ((kernel_info->regs+3)&~3);
+ assert(m_occupied_regs >= used_regs);
+ m_occupied_regs -= used_regs;
+
+ assert(m_occupied_ctas >= 1);
+ m_occupied_ctas--;
+}
////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1088,11 +1183,14 @@ void shader_core_ctx::mem_instruction_stats(const warp_inst_t &inst)
void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
{
- set_max_cta(kernel);
+// set_max_cta(kernel);
+ kernel.inc_running();
+ assert(occupy_shader_resource_1block(kernel, true));
// find a free CTA context
unsigned free_cta_hw_id=(unsigned)-1;
- for (unsigned i=0;i<kernel_max_cta_per_shader;i++ ) {
+// for (unsigned i=0;i<kernel_max_cta_per_shader;i++ ) {
+ for (unsigned i=0;i<m_config->max_cta_per_core;i++ ) {
if( m_cta_status[i]==0 ) {
free_cta_hw_id=i;
break;
@@ -1109,8 +1207,11 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
int padded_cta_size = cta_size;
if (cta_size%m_config->warp_size)
padded_cta_size = ((cta_size/m_config->warp_size)+1)*(m_config->warp_size);
- unsigned start_thread = free_cta_hw_id * padded_cta_size;
- unsigned end_thread = start_thread + cta_size;
+ unsigned int start_thread = find_available_hwtid(padded_cta_size);
+ assert((int)start_thread != -1);
+ unsigned int end_thread = start_thread + cta_size;
+// unsigned start_thread = free_cta_hw_id * padded_cta_size;
+// unsigned end_thread = start_thread + cta_size;
// reset the microarchitecture state of the selected hardware thread and warp contexts
reinit(start_thread, end_thread,false);
@@ -1138,7 +1239,9 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
m_n_active_cta++;
shader_CTA_count_log(m_sid, 1);
- printf("GPGPU-Sim uArch: core:%3d, cta:%2u initialized @(%lld,%lld)\n", m_sid, free_cta_hw_id, gpu_sim_cycle, gpu_tot_sim_cycle );
+ printf("GPGPU-Sim uArch: core:%3d, cta:%2u, start_tid:%4u, end_tid:%4u, initialized @(%lld,%lld)\n",
+ m_sid, free_cta_hw_id, start_thread, end_thread, gpu_sim_cycle, gpu_tot_sim_cycle );
+
}
///////////////////////////////////////////////////////////////////////////////////////////
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index de5bcf6..8cba31e 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -296,6 +296,12 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
m_last_inst_gpu_sim_cycle = 0;
m_last_inst_gpu_tot_sim_cycle = 0;
+
+ //Jin: for concurrent kernels on a SM
+ m_occupied_n_threads = 0;
+ m_occupied_shmem = 0;
+ m_occupied_regs = 0;
+ m_occupied_ctas = 0;
}
void shader_core_ctx::reinit(unsigned start_thread, unsigned end_thread, bool reset_not_completed )
@@ -303,6 +309,13 @@ void shader_core_ctx::reinit(unsigned start_thread, unsigned end_thread, bool re
if( reset_not_completed ) {
m_not_completed = 0;
m_active_threads.reset();
+
+ //Jin: for concurrent kernels on a SM
+ m_occupied_n_threads = 0;
+ m_occupied_shmem = 0;
+ m_occupied_regs = 0;
+ m_occupied_ctas = 0;
+
}
for (unsigned i = start_thread; i<end_thread; i++) {
m_threadState[i].n_insn = 0;
@@ -620,7 +633,7 @@ void shader_core_ctx::fetch()
if( m_threadState[tid].m_active == true ) {
m_threadState[tid].m_active = false;
unsigned cta_id = m_warp[warp_id].get_cta_id();
- register_cta_thread_exit(cta_id);
+ register_cta_thread_exit(cta_id, &(m_thread[tid]->get_kernel()));
m_not_completed -= 1;
m_active_threads.reset(tid);
assert( m_thread[tid]!= NULL );
@@ -1917,7 +1930,7 @@ void ldst_unit::cycle()
}
}
-void shader_core_ctx::register_cta_thread_exit( unsigned cta_num )
+void shader_core_ctx::register_cta_thread_exit( unsigned cta_num, kernel_info_t * kernel)
{
assert( m_cta_status[cta_num] > 0 );
m_cta_status[cta_num]--;
@@ -1925,23 +1938,33 @@ void shader_core_ctx::register_cta_thread_exit( unsigned cta_num )
m_n_active_cta--;
m_barriers.deallocate_barrier(cta_num);
shader_CTA_count_unlog(m_sid, 1);
+
printf("GPGPU-Sim uArch: Shader %d finished CTA #%d (%lld,%lld), %u CTAs running\n", m_sid, cta_num, gpu_sim_cycle, gpu_tot_sim_cycle,
m_n_active_cta );
+
if( m_n_active_cta == 0 ) {
- assert( m_kernel != NULL );
- m_kernel->dec_running();
- printf("GPGPU-Sim uArch: Shader %u empty (release kernel %u \'%s\').\n", m_sid, m_kernel->get_uid(),
- m_kernel->name().c_str() );
- if( !m_gpu->kernel_more_cta_left(m_kernel) ) {
- if( !m_kernel->running() ) {
- printf("GPGPU-Sim uArch: GPU detected kernel %u \'%s\' finished on shader %u.\n", m_kernel->get_uid(),
- m_kernel->name().c_str(), m_sid );
- m_gpu->set_kernel_done( m_kernel );
- }
- }
- m_kernel=NULL;
+ printf("GPGPU-Sim uArch: Shader %u empty (last released kernel %u \'%s\').\n", m_sid, kernel->get_uid(),
+ kernel->name().c_str() );
fflush(stdout);
+
+ //Shader can only be empty when no more cta are dispatched
+ assert(m_kernel == NULL || !m_gpu->kernel_more_cta_left(m_kernel));
+ m_kernel = NULL;
+ }
+
+ //Jin: for concurrent kernels on sm
+ release_shader_resource_1block(*kernel);
+ kernel->dec_running();
+ if( !m_gpu->kernel_more_cta_left(kernel) ) {
+ if( !kernel->running() ) {
+ printf("GPGPU-Sim uArch: GPU detected kernel %u \'%s\' finished on shader %u.\n", kernel->get_uid(),
+ kernel->name().c_str(), m_sid );
+ if(m_kernel == kernel)
+ m_kernel = NULL;
+ m_gpu->set_kernel_done( kernel );
+ }
}
+
}
}
@@ -3239,15 +3262,27 @@ unsigned simt_core_cluster::issue_block2core()
unsigned num_blocks_issued=0;
for( unsigned i=0; i < m_config->n_simt_cores_per_cluster; i++ ) {
unsigned core = (i+m_cta_issue_next_core+1)%m_config->n_simt_cores_per_cluster;
- if( m_core[core]->get_not_completed() == 0 ) {
- if( m_core[core]->get_kernel() == NULL ) {
- kernel_info_t *k = m_gpu->select_kernel();
- if( k )
- m_core[core]->set_kernel(k);
- }
- }
+
kernel_info_t *kernel = m_core[core]->get_kernel();
- if( m_gpu->kernel_more_cta_left(kernel) && (m_core[core]->get_n_active_cta() < m_config->max_cta(*kernel)) ) {
+
+ //Jin: check if to fetch the next kernel
+ if( !m_gpu->kernel_more_cta_left(kernel) ) {
+ if(m_config->gpgpu_concurrent_kernel_sm || //concurrent kernel on sm
+
+ //otherwise wait till current kernel finishes
+ (!m_config->gpgpu_concurrent_kernel_sm &&
+ m_core[core]->get_not_completed() == 0) )
+ {
+ kernel_info_t *k = m_gpu->select_kernel();
+ if( k )
+ m_core[core]->set_kernel(k);
+ }
+ }
+
+ kernel = m_core[core]->get_kernel();
+ if( m_gpu->kernel_more_cta_left(kernel) &&
+// (m_core[core]->get_n_active_cta() < m_config->max_cta(*kernel)) ) {
+ m_core[core]->can_issue_1block(*kernel)) {
m_core[core]->issue_block2core(*kernel);
num_blocks_issued++;
m_cta_issue_next_core=core;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 38d09e9..fcbc8aa 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1327,6 +1327,9 @@ struct shader_core_config : public core_config
int simt_core_sim_order;
unsigned mem2device(unsigned memid) const { return memid + n_simt_clusters; }
+
+ //Jin: concurrent kernel on sm
+ bool gpgpu_concurrent_kernel_sm;
};
struct shader_core_stats_pod {
@@ -1574,6 +1577,7 @@ public:
void cycle();
void reinit(unsigned start_thread, unsigned end_thread, bool reset_not_completed );
void issue_block2core( class kernel_info_t &kernel );
+
void cache_flush();
void accept_fetch_response( mem_fetch *mf );
void accept_ldst_unit_response( class mem_fetch * mf );
@@ -1582,7 +1586,7 @@ public:
{
assert(k);
m_kernel=k;
- k->inc_running();
+// k->inc_running();
printf("GPGPU-Sim uArch: Shader %d bind to kernel %u \'%s\'\n", m_sid, m_kernel->get_uid(),
m_kernel->name().c_str() );
}
@@ -1749,7 +1753,7 @@ public:
virtual void checkExecutionStatusAndUpdate(warp_inst_t &inst, unsigned t, unsigned tid);
address_type next_pc( int tid ) const;
void fetch();
- void register_cta_thread_exit( unsigned cta_num );
+ void register_cta_thread_exit( unsigned cta_num, kernel_info_t * kernel );
void decode();
@@ -1831,6 +1835,20 @@ public:
// is that the dynamic_warp_id is a running number unique to every warp
// run on this shader, where the warp_id is the static warp slot.
unsigned m_dynamic_warp_id;
+
+ //Jin: concurrent kernels on a sm
+public:
+ bool can_issue_1block(kernel_info_t & kernel);
+ bool occupy_shader_resource_1block(kernel_info_t & kernel, bool occupy);
+ void release_shader_resource_1block(kernel_info_t & kernel);
+ int find_available_hwtid(unsigned int cta_size);
+private:
+ unsigned int m_occupied_n_threads;
+ unsigned int m_occupied_shmem;
+ unsigned int m_occupied_regs;
+ unsigned int m_occupied_ctas;
+
+
};
class simt_core_cluster {
@@ -1851,6 +1869,7 @@ public:
bool icnt_injection_buffer_full(unsigned size, bool write);
void icnt_inject_request_packet(class mem_fetch *mf);
+
// for perfect memory interface
bool response_queue_full() {
return ( m_response_fifo.size() >= m_config->n_simt_ejection_buffer_size );
generated by cgit v1.3 (git 2.53.0) at 2026-07-11 05:52:56 +0000