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-rw-r--r--src/gpgpu-sim/shader.cc3
-rw-r--r--src/trace-driven/trace_driven.cc5
2 files changed, 4 insertions, 4 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index de33026..926453a 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -1635,6 +1635,9 @@ bool ldst_unit::shared_cycle( warp_inst_t &inst, mem_stage_stall_type &rc_fail,
if( inst.space.get_type() != shared_space )
return true;
+ if( inst.active_count() == 0 )
+ return true;
+
if(inst.has_dispatch_delay()){
m_stats->gpgpu_n_shmem_bank_access[m_sid]++;
}
diff --git a/src/trace-driven/trace_driven.cc b/src/trace-driven/trace_driven.cc
index 3cedd5c..8a9d3f2 100644
--- a/src/trace-driven/trace_driven.cc
+++ b/src/trace-driven/trace_driven.cc
@@ -288,7 +288,7 @@ bool trace_warp_inst_t::parse_from_string(std::string trace, const std::unordere
//ignore core id
//ss>>std::dec>>sm_id>>warpid_sm;
- ss>>std::hex>>m_pc;
+ ss>>std::dec>>m_pc;
ss>>std::hex>>mask;
std::bitset<MAX_WARP_SIZE> mask_bits(mask);
@@ -634,9 +634,6 @@ void trace_shader_core_ctx::checkExecutionStatusAndUpdate(warp_inst_t &inst, uns
if ( inst.op == EXIT_OPS ) {
m_warp[inst.warp_id()].set_completed(t);
- //We did that because the Nvbit misses two instruction to report at the end of the kernel after the EXIT instruction
- //so we add them here to have better correlation with HW counters
- m_stats->m_num_sim_winsn[m_sid] += 2;
}
}