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-rw-r--r--src/cuda-sim/instructions.cc8
-rw-r--r--src/cuda-sim/opcodes.def2
-rw-r--r--src/cuda-sim/opcodes.h11
-rw-r--r--src/cuda-sim/ptx.l18
-rw-r--r--src/cuda-sim/ptx.y10
-rw-r--r--src/cuda-sim/ptx_ir.cc6
-rw-r--r--src/cuda-sim/ptx_ir.h33
-rw-r--r--src/cuda-sim/ptx_parser.cc33
-rw-r--r--src/cuda-sim/ptx_parser.h2
9 files changed, 114 insertions, 9 deletions
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index bddaf8c..7407269 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -1493,6 +1493,12 @@ unsigned trunc(unsigned num, unsigned precision) {
}
return num;
}
+void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
+{
+}
+void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
+{
+}
void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
{
@@ -1565,7 +1571,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
for (i=0;i<16;i++){
for(j=0;j<16;j++){
for(k=0;k<16;k++){
- matrix_d[i][j].f32=matrix_d[i][j].f32+matrix_a[i][k].f32*matrix_b[k][j].f32;
+ matrix_d[i][j].f32=matrix_d[i][j].f32+matrix_a[i][k].f32*matrix_b[j][k].f32;
}
matrix_d[i][j].f32+=matrix_c[i][j].f32;
}
diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def
index a3cc83f..e6f957a 100644
--- a/src/cuda-sim/opcodes.def
+++ b/src/cuda-sim/opcodes.def
@@ -53,6 +53,8 @@ OP_DEF(BRX_OP,brx_impl,"brx",0,3)
OP_DEF(BREV_OP,brev_impl,"brev",1,1)
OP_DEF(BRKPT_OP,brkpt_impl,"brkpt",1,9)
OP_W_DEF(MMA_OP,mma_impl,"mma",1,1)
+OP_W_DEF(MMA_LD_OP,mma_ld_impl,"mma_load",1,5)
+OP_W_DEF(MMA_ST_OP,mma_st_impl,"mma_store",0,5)
OP_DEF(CALL_OP,call_impl,"call",1,3)
OP_DEF(CALLP_OP,callp_impl,"callp",1,3)
OP_DEF(CLZ_OP,clz_impl,"clz",1,1)
diff --git a/src/cuda-sim/opcodes.h b/src/cuda-sim/opcodes.h
index aa133da..b91d92f 100644
--- a/src/cuda-sim/opcodes.h
+++ b/src/cuda-sim/opcodes.h
@@ -60,5 +60,14 @@ enum special_regs {
WARPID_REG,
WARPSZ_REG
};
-
+enum wmma_type{
+ LOAD_A,
+ LOAD_B,
+ LOAD_C,
+ STORE_D,
+ MMA,
+ ROW,
+ COL,
+ M16N16K16
+};
#endif
diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l
index e07e339..f67dddd 100644
--- a/src/cuda-sim/ptx.l
+++ b/src/cuda-sim/ptx.l
@@ -60,7 +60,7 @@ addc TC; ptx_lval.int_value = ADDC_OP; return OPCODE;
and TC; ptx_lval.int_value = AND_OP; return OPCODE;
andn TC; ptx_lval.int_value = ANDN_OP; return OPCODE;
atom TC; ptx_lval.int_value = ATOM_OP; return OPCODE;
-bar TC; ptx_lval.int_value = BAR_OP; return OPCODE;
+bar TC; ptx_lval.int_value = BAR_OP; return OPCODE;
bfe TC; ptx_lval.int_value = BFE_OP; return OPCODE;
bfi TC; ptx_lval.int_value = BFI_OP; return OPCODE;
bfind TC; ptx_lval.int_value = BFIND_OP; return OPCODE;
@@ -68,9 +68,12 @@ bra TC; ptx_lval.int_value = BRA_OP; return OPCODE;
brx TC; ptx_lval.int_value = BRX_OP; return OPCODE;
brev TC; ptx_lval.int_value = BREV_OP; return OPCODE;
brkpt TC; ptx_lval.int_value = BRKPT_OP; return OPCODE;
-mma TC; ptx_lval.int_value = MMA_OP; return OPCODE;
+wmma\.mma TC; ptx_lval.int_value = MMA_OP; return OPCODE;
+wmma\.load TC; ptx_lval.int_value = MMA_LD_OP; return OPCODE;
+wmma\.store TC; ptx_lval.int_value = MMA_ST_OP; return OPCODE;
+
call TC; BEGIN(NOT_OPCODE); ptx_lval.int_value = CALL_OP; return OPCODE; // blocking opcode token in case the callee has the same name as an opcode
-callp TC; BEGIN(NOT_OPCODE); ptx_lval.int_value = CALLP_OP; return OPCODE;
+callp TC; BEGIN(NOT_OPCODE); ptx_lval.int_value = CALLP_OP; return OPCODE;
clz TC; ptx_lval.int_value = CLZ_OP; return OPCODE;
cnot TC; ptx_lval.int_value = CNOT_OP; return OPCODE;
cos TC; ptx_lval.int_value = COS_OP; return OPCODE;
@@ -153,6 +156,15 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE;
"CPTX_END" printf("ENDING CUSTOM PTX.\n"); BEGIN(IN_COMMENT);
<INITIAL,NOT_OPCODE,IN_INST,IN_FUNC_DECL>{
+\.a\.sync TC; ptx_lval.int_value = LOAD_A; return WMMA_DIRECTIVE;
+\.b\.sync TC; ptx_lval.int_value = LOAD_B; return WMMA_DIRECTIVE;
+\.c\.sync TC; ptx_lval.int_value = LOAD_C; return WMMA_DIRECTIVE;
+\.d\.sync TC; ptx_lval.int_value = STORE_D; return WMMA_DIRECTIVE;
+\.sync TC;ptx_lval.int_value=MMA; return WMMA_DIRECTIVE;
+\.row TC; ptx_lval.int_value = ROW; return LAYOUT;
+\.col TC; ptx_lval.int_value = COL; return LAYOUT;
+\.m16n16k16 TC; ptx_lval.int_value = M16N16K16; return CONFIGURATION;
+
\.align TC; return ALIGN_DIRECTIVE;
\.branchtargets TC; return BRANCHTARGETS_DIRECTIVE;
diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y
index 3360c55..737657c 100644
--- a/src/cuda-sim/ptx.y
+++ b/src/cuda-sim/ptx.y
@@ -37,6 +37,9 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%token <string_value> STRING
%token <int_value> OPCODE
+%token <int_value> WMMA_DIRECTIVE
+%token <int_value> LAYOUT
+%token <int_value> CONFIGURATION
%token ALIGN_DIRECTIVE
%token BRANCHTARGETS_DIRECTIVE
%token BYTE_DIRECTIVE
@@ -428,6 +431,7 @@ option: type_spec
| compare_spec
| addressable_spec
| rounding_mode
+ | wmma_spec
| SYNC_OPTION { add_option(SYNC_OPTION); }
| ARRIVE_OPTION { add_option(ARRIVE_OPTION); }
| RED_OPTION { add_option(RED_OPTION); }
@@ -483,6 +487,7 @@ atomic_operation_spec: ATOMIC_AND { add_option(ATOMIC_AND); }
rounding_mode: floating_point_rounding_mode
| integer_rounding_mode;
+
floating_point_rounding_mode: RN_OPTION { add_option(RN_OPTION); }
| RZ_OPTION { add_option(RZ_OPTION); }
| RM_OPTION { add_option(RM_OPTION); }
@@ -515,6 +520,10 @@ compare_spec:EQ_OPTION { add_option(EQ_OPTION); }
| NAN_OPTION { add_option(NAN_OPTION); }
;
+wmma_spec: WMMA_DIRECTIVE LAYOUT CONFIGURATION{add_wmma_option($1);add_wmma_option($2);add_wmma_option($3);}
+ | WMMA_DIRECTIVE LAYOUT LAYOUT CONFIGURATION{add_wmma_option($1);add_wmma_option($2),add_wmma_option($3),add_wmma_option($4)}
+ ;
+
operand_list: operand
| operand COMMA operand_list;
@@ -543,6 +552,7 @@ operand: IDENTIFIER { add_scalar_operand( $1 ); }
vector_operand: LEFT_BRACE IDENTIFIER COMMA IDENTIFIER RIGHT_BRACE { add_2vector_operand($2,$4); }
| LEFT_BRACE IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER RIGHT_BRACE { add_3vector_operand($2,$4,$6); }
| LEFT_BRACE IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER RIGHT_BRACE { add_4vector_operand($2,$4,$6,$8); }
+ | LEFT_BRACE IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER COMMA IDENTIFIER RIGHT_BRACE { add_8vector_operand($2,$4,$6,$8,$10,$12,$14,$16); }
| LEFT_BRACE IDENTIFIER RIGHT_BRACE { add_1vector_operand($2); }
;
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index 8ebdcf8..9a4d8d3 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -995,7 +995,7 @@ static std::list<operand_info> check_operands( int opcode,
const std::list<operand_info> &operands )
{
static int g_warn_literal_operands_two_type_inst;
- if( (opcode == CVT_OP) || (opcode == SET_OP) || (opcode == SLCT_OP) || (opcode == TEX_OP) ) {
+ if( (opcode == CVT_OP) || (opcode == SET_OP) || (opcode == SLCT_OP) || (opcode == TEX_OP) || (opcode==MMA_OP)) {
// just make sure these do not have have const operands...
if( !g_warn_literal_operands_two_type_inst ) {
std::list<operand_info>::const_iterator o;
@@ -1043,6 +1043,7 @@ ptx_instruction::ptx_instruction( int opcode,
const std::list<operand_info> &operands,
const operand_info &return_var,
const std::list<int> &options,
+ const std::list<int> &wmma_options,
const std::list<int> &scalar_type,
memory_space_t space_spec,
const char *file,
@@ -1061,6 +1062,7 @@ ptx_instruction::ptx_instruction( int opcode,
m_operands.insert(m_operands.begin(), checked_operands.begin(), checked_operands.end() );
m_return_var = return_var;
m_options = options;
+ m_wmma_options = wmma_options;
m_wide = false;
m_hi = false;
m_lo = false;
@@ -1078,7 +1080,7 @@ ptx_instruction::ptx_instruction( int opcode,
m_atomic_spec = 0;
m_membar_level = 0;
m_inst_size = 8; // bytes
-
+ int rr=0;
std::list<int>::const_iterator i;
unsigned n=1;
for ( i=options.begin(); i!= options.end(); i++, n++ ) {
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index 0601b97..ff24a66 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -582,6 +582,34 @@ public:
m_is_return_var = false;
m_immediate_address=false;
}
+ operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 ,const symbol *s5,const symbol *s6,const symbol *s7, const symbol *s8)
+ {
+ init();
+ m_is_non_arch_reg = false;
+ m_addr_space = undefined_space;
+ m_operand_lohi = 0;
+ m_double_operand_type = 0;
+ m_operand_neg = false;
+ m_const_mem_offset = 0;
+ m_uid = get_uid();
+ m_valid = true;
+ m_vector = true;
+ m_type = vector_t;
+ m_value.m_vector_symbolic = new const symbol*[8];
+ m_value.m_vector_symbolic[0] = s1;
+ m_value.m_vector_symbolic[1] = s2;
+ m_value.m_vector_symbolic[2] = s3;
+ m_value.m_vector_symbolic[3] = s4;
+ m_value.m_vector_symbolic[4] = s5;
+ m_value.m_vector_symbolic[5] = s6;
+ m_value.m_vector_symbolic[6] = s7;
+ m_value.m_vector_symbolic[7] = s8;
+ m_addr_offset = 0;
+ m_neg_pred = false;
+ m_is_return_var = false;
+ m_immediate_address=false;
+ }
+
void init()
{
m_uid=(unsigned)-1;
@@ -866,6 +894,7 @@ public:
const std::list<operand_info> &operands,
const operand_info &return_var,
const std::list<int> &options,
+ const std::list<int> &wmma_options,
const std::list<int> &scalar_type,
memory_space_t space_spec,
const char *file,
@@ -1087,6 +1116,7 @@ private:
operand_info m_return_var;
std::list<int> m_options;
+ std::list<int> m_wmma_options;
bool m_wide;
bool m_hi;
bool m_lo;
@@ -1096,6 +1126,9 @@ private:
bool m_uni; //if branch instruction, this evaluates to true for uniform branches (ie jumps)
bool m_to_option;
unsigned m_cache_option;
+ unsigned m_wmma_type;
+ unsigned m_wmma_layout[2];
+ unsigned m_wmma_configuration;
unsigned m_rounding_mode;
unsigned m_compare_op;
unsigned m_saturation_mode;
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index 7fc54e9..6757091 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -72,6 +72,7 @@ symbol *g_label;
int g_opcode = -1;
std::list<operand_info> g_operands;
std::list<int> g_options;
+std::list<int> g_wmma_options;
std::list<int> g_scalar_type;
#define PTX_PARSE_DPRINTF(...) \
@@ -162,6 +163,7 @@ void init_instruction_state()
g_label = NULL;
g_opcode = -1;
g_options.clear();
+ g_wmma_options.clear();
g_return_var = operand_info();
init_directive_state();
}
@@ -300,6 +302,7 @@ void add_instruction()
g_operands,
g_return_var,
g_options,
+ g_wmma_options,
g_scalar_type,
g_space_spec,
g_filename,
@@ -629,7 +632,7 @@ void add_scalar_type_spec( int type_spec )
g_scalar_type.push_back( type_spec );
if ( g_scalar_type.size() > 1 ) {
parse_assert( (g_opcode == -1) || (g_opcode == CVT_OP) || (g_opcode == SET_OP) || (g_opcode == SLCT_OP)
- || (g_opcode == TEX_OP),
+ || (g_opcode == TEX_OP)|| (g_opcode==MMA_OP),
"only cvt, set, slct, and tex can have more than one type specifier.");
}
g_scalar_type_spec = type_spec;
@@ -669,7 +672,11 @@ void add_option( int option )
PTX_PARSE_DPRINTF("add_option");
g_options.push_back( option );
}
-
+void add_wmma_option( int option )
+{
+ PTX_PARSE_DPRINTF("add_option");
+ g_wmma_options.push_back( option );
+}
void add_double_operand( const char *d1, const char *d2 )
{
//operands that access two variables.
@@ -725,6 +732,28 @@ void add_4vector_operand( const char *d1, const char *d2, const char *d3, const
if ( s4 == null_op ) s4 = NULL;
g_operands.push_back( operand_info(s1,s2,s3,s4) );
}
+void add_8vector_operand( const char *d1, const char *d2, const char *d3, const char *d4,const char *d5,const char *d6,const char *d7,const char *d8 )
+{
+ PTX_PARSE_DPRINTF("add_8vector_operand");
+ const symbol *s1 = g_current_symbol_table->lookup(d1);
+ const symbol *s2 = g_current_symbol_table->lookup(d2);
+ const symbol *s3 = g_current_symbol_table->lookup(d3);
+ const symbol *s4 = g_current_symbol_table->lookup(d4);
+ const symbol *s5 = g_current_symbol_table->lookup(d5);
+ const symbol *s6 = g_current_symbol_table->lookup(d6);
+ const symbol *s7 = g_current_symbol_table->lookup(d7);
+ const symbol *s8 = g_current_symbol_table->lookup(d8);
+ parse_assert( s1 != NULL && s2 != NULL && s3 != NULL && s4 != NULL && s5 !=NULL && s6 !=NULL && s7 !=NULL && s8 !=NULL, "v4 component(s) missing declarations.");
+ const symbol *null_op = g_current_symbol_table->lookup("_");
+ if ( s2 == null_op ) s2 = NULL;
+ if ( s3 == null_op ) s3 = NULL;
+ if ( s4 == null_op ) s4 = NULL;
+ if ( s5 == null_op ) s5 = NULL;
+ if ( s6 == null_op ) s6 = NULL;
+ if ( s7 == null_op ) s7 = NULL;
+ if ( s8 == null_op ) s8 = NULL;
+ g_operands.push_back( operand_info(s1,s2,s3,s4,s5,s6,s7,s8) );
+}
void add_builtin_operand( int builtin, int dim_modifier )
{
diff --git a/src/cuda-sim/ptx_parser.h b/src/cuda-sim/ptx_parser.h
index 32f3903..8094b43 100644
--- a/src/cuda-sim/ptx_parser.h
+++ b/src/cuda-sim/ptx_parser.h
@@ -57,7 +57,9 @@ void add_1vector_operand( const char *d1 );
void add_2vector_operand( const char *d1, const char *d2 );
void add_3vector_operand( const char *d1, const char *d2, const char *d3 );
void add_4vector_operand( const char *d1, const char *d2, const char *d3, const char *d4 );
+void add_8vector_operand( const char *d1, const char *d2, const char *d3, const char *d4 ,const char *d5,const char *d6,const char *d7,const char *d8);
void add_option(int option );
+void add_wmma_option(int option );
void add_builtin_operand( int builtin, int dim_modifier );
void add_memory_operand( );
void add_literal_int( int value );
generated by cgit v1.3 (git 2.53.0) at 2026-07-11 02:27:54 +0000