diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 29 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.h | 5 |
2 files changed, 22 insertions, 12 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 82e4540..1cc596b 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -384,6 +384,11 @@ void shader_core_stats::visualizer_print( gzFile visualizer_file ) for (unsigned i=0;i<m_config->num_shader();i++) gzprintf(visualizer_file, "%u ", m_num_sim_insn[i] ); gzprintf(visualizer_file, "\n"); + // warp instruction count per shader core + gzprintf(visualizer_file, "shaderwarpinsncount: "); + for (unsigned i=0;i<m_config->num_shader();i++) + gzprintf(visualizer_file, "%u ", m_num_sim_winsn[i] ); + gzprintf(visualizer_file, "\n"); // warp divergence per shader core gzprintf(visualizer_file, "shaderwarpdiv: "); for (unsigned i=0;i<m_config->num_shader();i++) @@ -706,6 +711,13 @@ void ldst_unit::print_cache_stats( FILE *fp, unsigned& dl1_accesses, unsigned& d } } +void shader_core_ctx::warp_inst_complete(const warp_inst_t &inst) +{ + m_stats->m_num_sim_insn[m_sid] += inst.active_count(); + m_stats->m_num_sim_winsn[m_sid]++; + m_gpu->gpu_sim_insn += inst.active_count(); +} + void shader_core_ctx::writeback() { warp_inst_t *&pipe_reg = m_pipeline_reg[EX_WB]; @@ -713,13 +725,12 @@ void shader_core_ctx::writeback() unsigned warp_id = pipe_reg->warp_id(); m_scoreboard->releaseRegisters( pipe_reg ); m_warp[warp_id].dec_inst_in_pipeline(); - m_stats->m_num_sim_insn[m_sid]++; + warp_inst_complete(*pipe_reg); + pipe_reg->completed(gpu_tot_sim_cycle + gpu_sim_cycle); m_gpu->gpu_sim_insn_last_update_sid = m_sid; m_gpu->gpu_sim_insn_last_update = gpu_sim_cycle; m_last_inst_gpu_sim_cycle = gpu_sim_cycle; m_last_inst_gpu_tot_sim_cycle = gpu_tot_sim_cycle; - m_gpu->gpu_sim_insn += pipe_reg->active_count(); - pipe_reg->completed(gpu_tot_sim_cycle + gpu_sim_cycle); pipe_reg->clear(); } } @@ -955,14 +966,12 @@ void ldst_unit::writeback() if( !still_pending ) { m_pending_writes[m_next_wb.warp_id()].erase(m_next_wb.out[r]); m_scoreboard->releaseRegister( m_next_wb.warp_id(), m_next_wb.out[r] ); - m_stats->m_num_sim_insn[m_sid]++; - m_core->get_gpu()->gpu_sim_insn += m_next_wb.active_count(); + m_core->warp_inst_complete(m_next_wb); insn_completed = true; } } else { // shared m_scoreboard->releaseRegister( m_next_wb.warp_id(), m_next_wb.out[r] ); - m_stats->m_num_sim_insn[m_sid]++; - m_core->get_gpu()->gpu_sim_insn += m_next_wb.active_count(); + m_core->warp_inst_complete(m_next_wb); insn_completed = true; } } @@ -1116,10 +1125,9 @@ void ldst_unit::cycle() } } if( !pending_requests ) { - m_core->get_gpu()->gpu_sim_insn += m_dispatch_reg->active_count(); + m_core->warp_inst_complete(*m_dispatch_reg); m_dispatch_reg->completed(gpu_tot_sim_cycle + gpu_sim_cycle); m_scoreboard->releaseRegisters(m_dispatch_reg); - m_stats->m_num_sim_insn[m_sid]++; } m_core->dec_inst_in_pipeline(warp_id); m_dispatch_reg->clear(); @@ -1127,10 +1135,9 @@ void ldst_unit::cycle() } else { // stores exit pipeline here m_core->dec_inst_in_pipeline(warp_id); - m_core->get_gpu()->gpu_sim_insn += m_dispatch_reg->active_count(); + m_core->warp_inst_complete(*m_dispatch_reg); m_dispatch_reg->completed(gpu_tot_sim_cycle + gpu_sim_cycle); m_dispatch_reg->clear(); - m_stats->m_num_sim_insn[m_sid]++; } } } diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index d367b7f..1d86f02 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -990,7 +990,8 @@ struct shader_core_config : public core_config }; struct shader_core_stats_pod { - unsigned *m_num_sim_insn; // number of instructions committed by this shader core + unsigned *m_num_sim_insn; // number of scalar thread instructions committed by this shader core + unsigned *m_num_sim_winsn; // number of warp instructions committed by this shader core unsigned *m_n_diverge; // number of divergence occurring in this shader unsigned gpgpu_n_load_insn; unsigned gpgpu_n_store_insn; @@ -1031,6 +1032,7 @@ public: memset(pod,0,sizeof(shader_core_stats_pod)); m_num_sim_insn = (unsigned*) calloc(config->num_shader(),sizeof(unsigned)); + m_num_sim_winsn = (unsigned*) calloc(config->num_shader(),sizeof(unsigned)); m_n_diverge = (unsigned*) calloc(config->num_shader(),sizeof(unsigned)); shader_cycle_distro = (unsigned*) calloc(config->warp_size+3, sizeof(unsigned)); last_shader_cycle_distro = (unsigned*) calloc(m_config->warp_size+3, sizeof(unsigned)); @@ -1144,6 +1146,7 @@ public: void store_ack( class mem_fetch *mf ); bool warp_waiting_at_mem_barrier( unsigned warp_id ); void set_max_cta( const kernel_info_t &kernel ); + void warp_inst_complete(const warp_inst_t &inst); // accessors std::list<unsigned> get_regs_written( const inst_t &fvt ) const; |