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-rw-r--r--src/gpgpu-sim/l2cache.cc2
-rw-r--r--src/gpgpu-sim/shader.cc3
-rw-r--r--src/trace-driven/trace_driven.cc6
3 files changed, 8 insertions, 3 deletions
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index fb4ce32..8bbe91c 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -755,7 +755,7 @@ mem_fetch* memory_sub_partition::pop()
{
mem_fetch* mf = m_L2_icnt_queue->pop();
m_request_tracker.erase(mf);
- if ( mf && mf->isatomic() )
+ if ( mf && mf->isatomic() && !m_gpu->get_config().is_trace_driven_mode() )
mf->do_atomic();
if( mf && (mf->get_access_type() == L2_WRBK_ACC || mf->get_access_type() == L1_WRBK_ACC) ) {
delete mf;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index acf40e5..de33026 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -2311,7 +2311,8 @@ void ldst_unit::writeback()
if( !m_pipeline_reg[0]->empty() ) {
m_next_wb = *m_pipeline_reg[0];
if(m_next_wb.isatomic()) {
- m_next_wb.do_atomic();
+ if(!m_core->get_gpu()->get_config().is_trace_driven_mode())
+ m_next_wb.do_atomic();
m_core->decrement_atomic_count(m_next_wb.warp_id(), m_next_wb.active_count());
}
m_core->dec_inst_in_pipeline(m_pipeline_reg[0]->warp_id());
diff --git a/src/trace-driven/trace_driven.cc b/src/trace-driven/trace_driven.cc
index b4ccf48..3cedd5c 100644
--- a/src/trace-driven/trace_driven.cc
+++ b/src/trace-driven/trace_driven.cc
@@ -632,8 +632,12 @@ void trace_shader_core_ctx::checkExecutionStatusAndUpdate(warp_inst_t &inst, uns
if(inst.isatomic())
m_warp[inst.warp_id()].inc_n_atomic();
- if ( inst.op == EXIT_OPS )
+ if ( inst.op == EXIT_OPS ) {
m_warp[inst.warp_id()].set_completed(t);
+ //We did that because the Nvbit misses two instruction to report at the end of the kernel after the EXIT instruction
+ //so we add them here to have better correlation with HW counters
+ m_stats->m_num_sim_winsn[m_sid] += 2;
+ }
}