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-rw-r--r--src/abstract_hardware_model.cc3
-rw-r--r--src/cuda-sim/instructions.cc10
2 files changed, 10 insertions, 3 deletions
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc
index b24a77e..83e76fe 100644
--- a/src/abstract_hardware_model.cc
+++ b/src/abstract_hardware_model.cc
@@ -389,7 +389,8 @@ void warp_inst_t::memory_coalescing_arch_13( bool is_write, mem_access_type acce
assert(num_accesses <= MAX_ACCESSES_PER_INSN_PER_THREAD);
- for(unsigned access=0; access<num_accesses; access++) {
+// for(unsigned access=0; access<num_accesses; access++) {
+ for(unsigned access=0; (access<MAX_ACCESSES_PER_INSN_PER_THREAD)&&(m_per_scalar_thread[thread].memreqaddr[access]!=0); access++) {
new_addr_type addr = m_per_scalar_thread[thread].memreqaddr[access];
unsigned block_address = line_size_based_tag_func(addr,segment_size);
unsigned chunk = (addr&127)/32; // which 32-byte chunk within in a 128-byte chunk does this thread access?
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 6f1b5d3..42c63ca 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -3363,7 +3363,7 @@ void vp_ld_impl(const ptx_instruction *pI, core_t *core, warp_inst_t &inst)
else if(wmma_layout==COL){
//mem->read(new_addr+4*stride*i,size/8,&data[i].s64);
mem->read(new_addr+4*stride*i,size/8,&data[i].s64);
- mem_txn_addr[num_mem_txn++]=new_addr+4*i;
+ mem_txn_addr[num_mem_txn++]=new_addr+4*stride*i;
}
}
}
@@ -3410,7 +3410,13 @@ void vp_ld_impl(const ptx_instruction *pI, core_t *core, warp_inst_t &inst)
inst.set_addr(thrd, (new_addr_type *)mem_txn_addr , num_mem_txn);
inst.data_size = 4; // 4 byte transaction
assert( inst.memory_op == insn_memory_op );
-
+ printf("\nVPLOAD_THREAD%d:",thrd);
+ for(int lll=0;lll<num_mem_txn;lll++)
+ {
+ printf("%x ",mem_txn_addr[lll]);
+ }
+ printf("\n");
+
int num_reg;
if(g_debug_instruction){
printf("\nvp_ld:thread%d= ",thrd);