summaryrefslogtreecommitdiff
path: root/CHANGES
AgeCommit message (Collapse)Author
2021-10-17AccelWattch dev IntegrationVijayKandiah
2021-05-22Update CHANGESmkhairy
2020-04-21some additional changes descriptionstgrogers
2019-11-11Enabled CUDA 10. Added implementations for __cudaPushCallConfiguration and ↵bftf
__cudaPopCallConfiguration, neither of which are documented in the CUDA API but they preceed any cudaLaunchKernel() call and push the call configuration on a stack which is then popped when cudaLaunchKernel() is called. Currently the max stack size is 1, an assert will be triggered when this is violated.
2018-11-19Update CHANGESmkhairy
2018-11-19Update CHANGESmkhairy
2018-11-09changes for checkpoint supportDeval Shah
2018-11-05addressed the deadlock issueaamir
2018-11-03merged with memory subsytem. Regression is passing but tensorcore kernel is ↵aamir
stuck in deadlock
2017-07-11Update CHANGESgpgpu-sim
added mention of a couple of recent changes
2016-06-02Modified config files to better represent Maxwell architecture; ↵Scott Peverelle
specifically, changed the number of clusters, controllers, and interconnect nodes. Also modified parse_and_compare to fix an occasional division by zero bug. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21812]
2016-06-02GeForceGTX750Ti correlation setup. Modified config file to reflect GTX750Ti ↵Scott Peverelle
architecture. Modified shader.h to allow for larger CTA per warp, to accomodate Maxwell specs. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21798]
2016-06-02Branch of GTX480 configs for Maxwell boardScott Peverelle
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21797]
2016-05-15fixing the creditsAhmed ElTantawy
2016-05-15Crediting lonestartGPU in the CHANGES for their help in CUDA 5.5 supportAhmed ElTantawy
2016-05-15updating CHANGESAhmed ElTantawy
2015-06-05Adding a description of the makefile changestgrogers
2015-04-08Fixed bug #88. Initial ejection buffer and boundary buffer with the ↵Myrice
interconnection node number Signed-off-by: Myrice <[email protected]>
2015-04-08Modified CHANGES for intersim2 svn removalMyrice
Signed-off-by: Myrice <[email protected]>
2015-03-05Merge pull request #9 from ElTantawy/masterandrewboktor
initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK running
2015-03-04initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK runningAhmed ElTantawy
2015-02-18Fixing icache bug where for each miss we also count a hit.Andrew Boktor
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14- Code review 1173001Tayler Hetherington
- Added a parameter to the cache configuration to configure the set index function. - Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
2014-08-14Fix Bug 81Ahmed El-Shafiey
http://www.gpgpu-sim.org/bugs/show_bug.cgi?id=81 Review ID: 173001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18179]
2014-08-14Fixing bugs 80 and 64Andrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17739]
2014-08-14Adding signed types to slct_impl, fixes ↵Andrew M. B. Boktor
http://www.gpgpu-sim.org/bugs/show_bug.cgi?id=78 review: 123001, LGTM: 2 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17692]
2014-08-14version 3.2.2Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17315]
2014-08-14warning fixes 2nd patch, including comments removal and strict aliasing fixes.leonyu
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183]
2014-08-14fix dram sampling interval scalingJingwen Leng (UT Austin)
fix dram clock energy scaling [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17124]
2014-08-14Bug FIX: icnt::full() check using wrong mf sizeDongdong Li
Review ID: 89001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17086]
2014-08-14Allocating aligned local memoryAndrew M. B. Boktor
Fixing the alignment of all types of memory so that it's aligned to size or 128byte whichever is smaller Refactoring out the padding code [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17047]
2014-08-14Fixing assertion that occurs when L1 cache is configured with ↵Wilson Fung
write-allocation policy. Also added description for the write-allocation fix implemented by Tayler. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16914]
2014-08-14Fixing the intra-partition address calculation so that every set in L2 cache ↵Wilson Fung
is used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16904]
2014-08-14Adding the ability to trace all the shader coresTim Rogers
Review ID: 75001 lgtm: 2 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16758]
2014-08-14Intesim2 IntegrationDongdong Li
Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747]
2014-08-14Updated the Fermi configurations to have two L2 banks per memory partition, ↵Wilson Fung
and the data port in each bank is limited to 32B/cycle. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16700]
2014-08-14Adding bandwidth modeling to the cache model.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671]
2014-08-14Lengthened the DRAM return queue size to have enough credits in order to ↵Wilson Fung
keep the DRAM utilized. Also extended the state printing function to print out mem_fetch entries inside the DRAM delay queue. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16639]
2014-08-14Fix for bug 63. bk[i]->n_idle should be bk[j]->n_idle instead.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16635]
2014-08-14Redesigned the memory partition unit to support multiple L2 cache banks per ↵Wilson Fung
partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613]
2014-08-14Adding option to force global memory accesses to skip L1 data cache while ↵Wilson Fung
still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601]
2014-08-14Integrating changes from my personal branch.Tim Rogers
Main contribution is a static warp limiting scheduler. There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines Review ID: 36001 lgtm: 1 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580]
2014-08-14Updated the aerialvision log parser to detect for metric sample that ↵Wilson Fung
contains no data. Instead of crashing, it prints out an warning and proceeds. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16569]
2014-08-14Adding the ability to querry the WARPSZ flag from the ptx script.Tim Rogers
Also changed some initialization code when cores are created in both the funcational and perfromance simulator review:3001 lgtm:5 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506]
2014-08-14 Changing the make flow so all the generated files, both object and code ↵Tim Rogers
generated go in a directory independent of the source directory [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16503]
2014-08-14Interconnection traffic breakdown stats (integration from TM branch).Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495]
2014-08-14Adding new option '-liveness_message_freq', which throttles the frequency of ↵Wilson Fung
simulation liveness printout (default to 1 per second in wall clock time). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16482]
2014-08-14cleaning up descriptions in CHANGES (new feature vs bug fix)Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16480]
2014-08-14Review: 46001. Fixing a source of non-determinism in GPGPU-Sim (Bug 174). ↵Tayler Hetherington
Not sure if this is the only issue, but this was definitely a source of non-determinism (checked with many of the <rodinia>-FT benchmarks). In gpgpu_sim_thread_concurrent() (gpgpusim_entrypoint.cc), the inner do{...}while(active); only breaks when the gpu is not active. As a result, the gpu is only initialized when the gpu becomes momentarily inactive. If one kernel completes while another kernel is currently pending in the stream's queue, the next kernel will start running immediately causing the GPU to not be reinitialized (which includes resetting per-kernel stats). The fix simply recognizes that a kernel has completed and breaks from the loop prior to starting the next operation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16463]