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2026-04-27fix co-issue scheduling pc assertionsDavit Grigoryan
2026-04-27add debug scoreboard stats countingDavit Grigoryan
2026-04-24fix proper conflict counter for shrd mem accessesDavit Grigoryan
2026-04-24fix global mem reqs coalescingDavit Grigoryan
2026-04-23co-issue global mem requestsDavit Grigoryan
2026-04-18impl xor lane shuffling; add delay option for operand readsDavit Grigoryan
2026-04-13impl intra-warp co-issuingDavit Grigoryan
2026-04-12impl thread compactionDavit Grigoryan
2026-04-11initial impl of mimd timing modelDavit Grigoryan
2026-04-08add simple simd lane set partitioningDavit Grigoryan
2026-03-30initial its implDavit Grigoryan
2026-01-22Partial Revert "Fix correlation on A100 CUTLASS GEMM Kernels (#127)" (#133)JRPan
* Partial Revert "Fix correlation on A100 CUTLASS GEMM Kernels (#127)" This reverts commit 987a23f84f8705c0566a47aeda2132fa33a82618. Only reverting the kernel issue part - issue_block2core. Co-Authored-By: Claude Opus 4.5 <[email protected]> * Modernize latency array declarations with C++17 style - Replace C-style arrays with std::array for type safety - Add zero-initialization using {} for arrays - Add explicit zero-initialization for scalar latency variables - Add #include <array> header Co-Authored-By: Claude Opus 4.5 <[email protected]> * format code --------- Co-authored-by: Claude Opus 4.5 <[email protected]>
2025-09-03Fix correlation on A100 CUTLASS GEMM Kernels (#127)JRPan
* 1. Add a queue to promote fairness CTA scheduling 2. Add a Perfect xbar interconnect option * remove merge queue * Should not change this * rename pending cta to allocated_ctas * run formatter
2025-08-19running formatter (#126)JRPan
* running formatter * consolidate CI runs * use cluster to run formatter * use cluster to run formatter * Add a CI-Success step
2025-02-18A bunch of maintenance fixes, the largest of which is getting the PTX ↵Tim Rogers
simulation to work with CUDA 12. (#95) * Fixing the formatter to always use a consistent format and running it on the codebase * Update linux-so-version.txt * Update Makefile * A couple of unnecessary files that are lingering around * Support CUDA 12 * Getting the PTX simulations to work with CUDA 12. The issue is that ptxas added more information (number of barriers and compile time). We have to parse these or lexx/yacc fail. * Update ptxinfo.l debug MACRO was ineffective * Update gpgpusim_check.cmake Update to make the CUDA version print a warning, not an error and updating the print to be more reflective of what the actual problem is.
2024-08-21Stream stats (#71)JRPan
* Temp commit for Justin and Cassie to sync on code changes for adding per-stream status. * Resolved compile errors. * Removed redundant parameter * Passed cuda_stream_id from accelsim to gpgpusim * Cleaned up unused changes * Changed vector to map, having operator problems. * StreamID defaults to zero * Implemented streams to inc_stats and so on * Fixed TOTAL_ACCESS counts * Implemented GLOBAL_TIMER. * Fixed m_shader->get_kernel SEGFAULT issue in shader.cc. * Use warp_init to track streamID instead of issue_warp * Removed temp debug print * Modified cache_stats to only print data from latest finished stream Added optional arg to cache_stats::print_stats, cache_stats::print_fail_stats and their upstream functions. When streamID is specified, print stats from that stream. When not specified, print all stats. NOTE: current implementation depending on streamid never equals -1 * Removed default arg values of streamID * modified constructor of mem_fetch to pass in streamID * changed get_streamid to get_streamID * Added TODO to gpgpusim_entrypoint.cc and power_stat.cc * Only collect power stats when enabled * print last finished stream in PTX mode using last_streamID * take out additional printf * Add a field to baseline cache to indicate cache level * save gpu object in cache * Print stream ID only once per kernel * rm test print * use -1 for default stream id * cleanup debug prints * remove GLOABL_TIMER * Automated clang-format * Should be correct to print everything in power model * addressing concerns & errors * Automated clang-format * add m_stats_pw in operator+ * Automated Format --------- Co-authored-by: Justin Qiao <[email protected]> Co-authored-by: Justin Qiao <[email protected]> Co-authored-by: Tim Rogers <[email protected]> Co-authored-by: JRPan <[email protected]> Co-authored-by: purdue-jenkins <[email protected]>
2024-07-16Auto clang format (#74)Aaron Barnes
* add automated clang formatter * Automated clang-format * use /bin/bash and add print * use default checkout ref * Format only after tests are success * Run CI on merge group --------- Co-authored-by: barnes88 <[email protected]> Co-authored-by: JRPAN <[email protected]>
2023-06-12fixing bunch of formatting warnings (#53)Ahmad Alawneh
* fixing bunch of formating warrnings * remove unintialized and unused results warnnings * revert the changes , as it doenst fix the warning --------- Co-authored-by: Fangjia Shen <[email protected]>
2022-02-01Update CopyrightsJRPAN
2021-10-17AccelWattch dev IntegrationVijayKandiah
2021-05-23format codeMahmoud Khairy A. Abdallah
2020-11-09do not truncate 32 MSB bits of the memory addressallen
2020-05-27splitting trace-driven from gpgpu-sim - part 2Mahmoud
2020-05-23code refomrattingMahmoud
2020-05-23Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-traces
2019-11-21fixing the access alignment in trace-driven modeMahmoud
2019-10-16adding kernel latencyMahmoud
2019-09-20removing some comments and refectoring the codeMahmoud
2019-09-19support trace-driven and changing the shader.ccMahmoud
2019-09-16Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/ director formatting"Nick
This reverts commit 26ca8de4a6ec9bfe422a14cbe325a5f257df453b.
2019-09-13Add src/ director formattingNick
2019-09-12Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-09-12Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-traces
2019-09-11Remove g_stream_manager()Mengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-08-30Merge branch 'dev-nvidia' into dev-privateMahmoud
2019-08-30update the adaptive cache behaviour and make L1 fully assoc in VoltaMahmoud
2019-08-22Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-07-15Move s_g_pc_to_insnMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-15Move kernel_info_t::m_next_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-14Move warp_inst_sm_next_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-14Move sm_next_access_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-12Move g_cdp_enabledMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-11Move g_kernel_launch_latencyMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-11Move g_total_param_sizeMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-10Move g_pc_to_finfoMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-08Move g_ptx_sim_num_insnMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-06-05adding new cuda 9 APIs to run the deepbench workloadsMahmoud
2019-05-30adding new values to gpu contextMahmoud
generated by cgit v1.3 (git 2.53.0) at 2026-07-10 22:40:42 +0000