| Age | Commit message (Collapse) | Author |
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into dev
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into dev-tensor
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stuck in deadlock
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https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration
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branch, incorporating Dynamic Parallelism and many bug fixes.
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1- round robin inst issue for warp multiple schedulers
2- add sector mask in the memory request (to bused later for L2 sector cache)
3- Adding Fermi coalescer
4- Ensure different exen units are used in dual_issue mode
5- Report how many dual_issue happened
6- Adding oldest_first scheduler
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shader, should use hw_cta_id to store shared mem info
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
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http://www.gpgpu-sim.org/bugs/show_bug.cgi?id=81
Review ID: 173001
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18179]
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Also changed some initialization code when cores are created in both the funcational and perfromance simulator
review:3001 lgtm:5
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495]
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that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.).
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784]
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//depot/gpgpu_sim_research/fermi_power/distribution/...
to //depot/gpgpu_sim_research/fermi/distribution/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
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Now the two configs will feature 32-bank shared memory with a more flexible broadcast mechanism.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14509]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14067]
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Experimental library support (diff abstract_hardware_model.cc) (currently broken because of undocumented cudaGetExportTable function in the cuda rt api)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13793]
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- Now there is only one macro for all use of unordered_map in the code.
- Moving all instances of gcc/cuda version detection into a single file.
- Adding a warning when the fallback is triggered.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13542]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13535]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13519]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13435]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13410]
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callp_imp using a core_t function, thus moving the querying function into the abstract model of the core instead of shader_core_ctx which represents the performance mode. This code simplify the querying and also avoid the unnecessary calling hierarchy that was used.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13375]
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. the option -gpgpu_ptx_save_converted_ptxplus allows keeping the ptxplus file
. the option -gpgpu_keep allows keeping intermediate files used to communicate with other programs (e.g. cuobjdump)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12304]
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1. Adds support for using cuobjdump for both ptx and ptxplus execution. This has been tested with CUDA 4.0
. Ptxplus is no longer supported through decuda/decuda_to_ptxplus
2. Adds support for converting the SASS output by cuobjdump to ptxplus. This has been tested with CUDA 4.0
. The old path that extracts ptx from cubin files is still preserved
3. Adds a bank group model. (WARNING: memory config has changed, please adapt yours). To disable the bank groups model, set nbkgrp to 1 and tCCDL and tRTPL to 0
Diff the configuration files to learn about how to use those new options.
Merging
//depot/gpgpu_sim_research/fermi-test/distribution/...
to //depot/gpgpu_sim_research/fermi/distribution/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12023]
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it was always hardcoded to 2).
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11742]
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and observed the over-count for vector memory instruction. The fix eliminates the over-count.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11481]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11329]
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Merging
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/abstract_hardware_model.cc
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/abstract_hardware_model.h
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/gpgpusim_entrypoint.cc
to //depot/gpgpu_sim_research/fermi/distribution/src/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11286]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11231]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11227]
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Fix for Bug 119 - Incorrect coalescing of atomic accesses.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11226]
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