| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-08-09 | Add support for SHF ptx instruction (#70) | Cesar Avalos | |
| 2022-02-01 | Update Copyrights | JRPAN | |
| 2021-10-17 | AccelWattch dev Integration | VijayKandiah | |
| 2020-07-03 | removed whitespace changes | Lucy Liu | |
| 2020-07-03 | add activemask, bfind, vmin, and vmax implementations from Francois | Lucy Liu | |
| 2019-08-22 | Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵ | Mahmoud | |
| into dev-private | |||
| 2019-07-03 | Remove g_filename | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2019-06-12 | Add some vars in ptx_parser | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2019-06-10 | adding new wmma instruction cogif | Mahmoud | |
| 2019-05-20 | Fix col and linebuf | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2019-05-17 | Fix linebuf and col | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2019-05-17 | Move ptx parser to reentrant | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2019-03-24 | Parse bar.warp.sync as NOP operation ( which is acceptable in Stack based ↵ | Deval Shah | |
| reconvergence ) | |||
| 2018-11-09 | resolving merge conflict | Deval Shah | |
| 2018-10-24 | merged tensor-cores code | aamir | |
| 2018-10-05 | Merge pull request #15 from gjulianm/dev | Tim Rogers | |
| Naive fix of OpenCL parse errors | |||
| 2018-08-14 | parsing changes for timing model | aamir | |
| 2018-08-09 | added load | aamir | |
| 2018-08-07 | implemented prmt and started working on variable precision mul inst | aamir | |
| 2018-06-08 | regression passed | Aamir Raihan | |
| 2018-06-04 | parses through all ptx files, TODO: need to impl dp4a | Jonathan | |
| 2018-05-27 | added wmma parsing but execution getting aborted | aamir | |
| 2018-05-12 | commit for eece527project | negargoli93 | |
| 2018-04-14 | solving alignment issue | Amruth | |
| 2018-03-20 | code to load the embedded ptx directly and prevent cuobjdump to dump ↵ | letr63jd56 | |
| everytime we execute the code | |||
| 2018-03-19 | temporary fixes to parsing issues | letr63jd56 | |
| 2017-08-17 | Merged all work on the dev branch since the divergence point into the dnn ↵ | speverel | |
| branch, incorporating Dynamic Parallelism and many bug fixes. | |||
| 2016-09-06 | Merge pull request #30 from sspenst/dev | gpgpu-sim | |
| shfl instruction implemented | |||
| 2016-09-05 | Merge pull request #28 from jwang323/cdp_clean | gpgpu-sim | |
| Initial support of CUDA Dynamic Parallelism on GPGPUSim | |||
| 2016-08-24 | Added shfl instruction | sspenst | |
| 2016-08-05 | bsmad gives the correct output in the small cases I have tried, still need ↵ | sspenst | |
| to complete the TODOs noted in bsmad_impl | |||
| 2016-08-04 | A thread executing BSMAD is now able to access information from all threads ↵ | sspenst | |
| in its warp | |||
| 2016-07-06 | Added sstarr memory, which works the same as shared memory | sspenst | |
| 2016-07-05 | Slight addition to the parser for CPTX aesthetics. You now begin and end ↵ | sspenst | |
| your custom inserted PTX with CPTX_BEGIN and CPTX_END, respectively. | |||
| 2016-07-05 | ADD: support ptxinfo for sm_35 and cuda 6.5 | Jin Wang | |
| 2016-07-04 | Initial SST recognition from PTX parser | sspenst | |
| 2016-07-04 | Restored madp instruction. | speverel | |
| 2016-07-04 | Reverted part of the previous commit so that our new changes related to DNNs ↵ | sspenst | |
| can be done in a different branch | |||
| 2016-06-16 | Added the ability to inject arbitrary PTX instructions. ↵ | speverel | |
| This will be used to add custom instructions in the future; the imaginary instructions 'spr' and 'ama' have been added as samples. | |||
| 2016-06-07 | The ptx parser now recognizes the NC option for ld.global, however this ↵ | sspenst | |
| option is not actually implemented | |||
| 2016-06-02 | Updated parser and config file to support compute versions up to 5.2. Full ↵ | speverel | |
| support is NOT claimed; however, it has been tested to work on a number of CUDA version 7.5 benchmarks such as matrix multiply and simpleMultiGPU. | |||
| 2016-06-02 | Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵ | speverel | |
| changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information. | |||
| 2015-07-10 | Increase line buffer size | Guillermo Julián | |
| 2014-08-14 | This should fix 2.3 regression and may fix others as well. | Ahmed El-Shafiey | |
| Remove redudant definition for some tokens which confuses the parser [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18462] | |||
| 2014-08-14 | Support for named bariers + bar.red + bar.arrive instructions | Ahmed El-Shafiey | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452] | |||
| 2014-08-14 | OpenCL newer diver fix | Hadi Jooybar | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14554] | |||
| 2014-08-14 | Several changes to ptxplus towards getting the sphyraena benchmark to work. ↵ | Jimmy Kwa | |
| Add .false modifier to cuobjdump_to_ptxplus. It isn't supported in gpgpusim yet since we don't know what it does. Fixed most of the issues with global (const14) variable not being declared properly. Added "BRX" instruction to cuobjdump_to_ptxplus and some support for it in gpgpusim. There are other issues with it that still need to be worked out. Added support for translating IADD.CARRY sass instruction into ptxplus addp instructions. Fixed a bug with generating ".half" modifiers on instructions so the ptxplus instruction addresses should match sass addresses now. Separated ssy instructions from nop. However, they are still simulated as nop in gpgpusim. Sometime cuobjdump generate a blank link that takes up an address slot. This was changed to a nop. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14001] | |||
| 2014-08-14 | Added implementation of vote.ballot (passing directed test). Added popc ↵ | Wilson Fung | |
| (not tested). Reducing number of iterations for radixSortThrust for regression. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13993] | |||
| 2014-08-14 | Fixing the updated PTX parser for texture instructions. Created a new state ↵ | Wilson Fung | |
| for function declaration, which is terminated with LEFT_BRACE "{" to return to INITIAL state. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13790] | |||
| 2014-08-14 | Integration from TM-311 branch. | Wilson Fung | |
| - Updated PTX parser to support CUDA 4.1 and 4.2. - Revised fatbin workaround to a more robust version (with comments explaining it). - Added print_simulation_time() in gpgpu_sim_thread_concurrent(). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13789] | |||
