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path: root/src/cuda-sim/ptx.y
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2024-08-09Add support for SHF ptx instruction (#70)Cesar Avalos
2020-04-07Merge remote-tracking branch 'localpub/dev' into devtgrogers
2019-07-04added temp. solution to bypass function pointers in order for pytorch to runchris
2019-07-03Remove g_filenameMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-06-10Fix g_func_declMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-05-20Fix col and linebufMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-05-17Fix linebuf and colMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-05-17Move ptx parser to reentrantMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2018-11-03merged with memory subsytem. Regression is passing but tensorcore kernel is ↵aamir
stuck in deadlock
2018-10-24merged tensor-cores codeaamir
2018-10-05Merge pull request #15 from gjulianm/devTim Rogers
Naive fix of OpenCL parse errors
2018-08-09added loadaamir
2018-08-07implemented prmt and started working on variable precision mul instaamir
2018-06-06ptx.y fixed syntaxaamirraihan
2018-05-31mma_ld_implaamir
2018-05-27added wmma parsing but execution getting abortedaamir
2018-03-26Remove duplicate token in PTX parserNathan Conrad
2018-03-26.call instruction may have an empty argument listNathan Conrad
2017-08-17Merged all work on the dev branch since the divergence point into the dnn ↵speverel
branch, incorporating Dynamic Parallelism and many bug fixes.
2016-09-06Merge pull request #30 from sspenst/devgpgpu-sim
shfl instruction implemented
2016-09-05Merge pull request #28 from jwang323/cdp_cleangpgpu-sim
Initial support of CUDA Dynamic Parallelism on GPGPUSim
2016-08-24Added shfl instructionsspenst
2016-07-06Added sstarr memory, which works the same as shared memorysspenst
2016-07-05BUG: PTX section id. ADD: cudaDeviceSetLimit. BUG: parameter addresses for ↵Jin Wang
child kernels in CDP. BUG: .weak .entry and .weak .global directives in ptx file. BUG: empty_protected() for stream manager causes deadlock, change to empty()
2016-07-05ADD: initial support for instruction group used by CDPJin Wang
2016-07-05ADD: support ptxinfo for sm_35 and cuda 6.5Jin Wang
2016-06-07The ptx parser now recognizes the NC option for ld.global, however this ↵sspenst
option is not actually implemented
2016-06-02Updated parser and config file to support compute versions up to 5.2. Full ↵speverel
support is NOT claimed; however, it has been tested to work on a number of CUDA version 7.5 benchmarks such as matrix multiply and simpleMultiGPU.
2016-06-02Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵speverel
changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information.
2015-07-11Allow const directives in the parameter specificationGuillermo Julián
2015-07-11Allow visible directives in variable specificationsGuillermo Julián
2015-03-04initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK runningAhmed ElTantawy
2014-08-14-Forcing make clean to remove all automatically generated files by parsers ↵Ahmed El-Shafiey
(should fix regressions). -remove some printfs that were there for debugging [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18480]
2014-08-14This should fix 2.3 regression and may fix others as well.Ahmed El-Shafiey
Remove redudant definition for some tokens which confuses the parser [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18462]
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14Changing the QuadroFX5800 config to use compute capability 1.3 (no idea why ↵Wilson Fung
it was not...). Adding sign-extension mode for cvt.s16.s32 that writes to a .u32 register. Adding stub parsing for .maxnctapersm directive. Removing benchmarks with known-issues from regression list for now. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14572]
2014-08-14Extended PTX parser to recognize the .ptr .shared directive and allocate ↵Wilson Fung
shared memory buffer to those pointers. This is required to support OpenCL local memorywith the newer NVIDIA driver. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14565]
2014-08-14OpenCL newer diver fixHadi Jooybar
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14554]
2014-08-14Several changes to ptxplus towards getting the sphyraena benchmark to work. ↵Jimmy Kwa
Add .false modifier to cuobjdump_to_ptxplus. It isn't supported in gpgpusim yet since we don't know what it does. Fixed most of the issues with global (const14) variable not being declared properly. Added "BRX" instruction to cuobjdump_to_ptxplus and some support for it in gpgpusim. There are other issues with it that still need to be worked out. Added support for translating IADD.CARRY sass instruction into ptxplus addp instructions. Fixed a bug with generating ".half" modifiers on instructions so the ptxplus instruction addresses should match sass addresses now. Separated ssy instructions from nop. However, they are still simulated as nop in gpgpusim. Sometime cuobjdump generate a blank link that takes up an address slot. This was changed to a nop. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14001]
2014-08-14Added implementation of vote.ballot (passing directed test). Added popc ↵Wilson Fung
(not tested). Reducing number of iterations for radixSortThrust for regression. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13993]
2014-08-14Extending ptx.y to ignore the .minnctapersm directive (at least it will not ↵Wilson Fung
crash the simulator for now). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13841]
2014-08-14Adding single element vector operands to support tex.1d instructions in CUDA ↵Wilson Fung
4.1 and later. KMN-FT should pass with this changelist. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13833]
2014-08-14 Integration from TM-311 branch.Wilson Fung
- Updated PTX parser to support CUDA 4.1 and 4.2. - Revised fatbin workaround to a more robust version (with comments explaining it). - Added print_simulation_time() in gpgpu_sim_thread_concurrent(). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13789]
2014-08-14Fixing bugs 169, 170, 171Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13761]
2014-08-141. Fixing ptx with sm_20Andrew M. B. Boktor
2. Fixing the choice of files (since new we can choose) 3. Not allowing sm_20 with PTXPlus, forcing max capability it to 19 and printing a warning [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12279]
2014-08-14This changelist implements the following:Andrew M. B. Boktor
1. Adds support for using cuobjdump for both ptx and ptxplus execution. This has been tested with CUDA 4.0 . Ptxplus is no longer supported through decuda/decuda_to_ptxplus 2. Adds support for converting the SASS output by cuobjdump to ptxplus. This has been tested with CUDA 4.0 . The old path that extracts ptx from cubin files is still preserved 3. Adds a bank group model. (WARNING: memory config has changed, please adapt yours). To disable the bank groups model, set nbkgrp to 1 and tCCDL and tRTPL to 0 Diff the configuration files to learn about how to use those new options. Merging //depot/gpgpu_sim_research/fermi-test/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12023]
2014-08-14Adding option 'gpgpu_simt_core_sim_order' which allow the user to specify ↵Wilson Fung
the order in which cores are simulator per cycle. Also adding support for calling function with empty parameter list. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11489]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2010-12-21added support for negative .f64 operands in decuda_to_ptxplusJimmy Kwa
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8289]
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