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2017-11-18Also initiate our L2 accesses on copies back to the CPUtgrogers
2017-11-18fixing a stupid inheritance bugtgrogers
2017-11-18vectoradd is successfully filling the l2tgrogers
2017-10-26fixing a typo in config fileMahmoud
2017-09-14adding seperate sfu latency and init variablesMahmoud
2017-09-13Adding sperate dp_unitMahmoud
2017-07-06Adding the correct dependency for the detailed_version file. In order to ↵tgrogers
updatet the built number output when we run gpgpu-sim we need to recompile cuda-sim everytime the detailed_version has changed
2017-05-17Changing the version detection to be much more detailed. Now the git commit ↵tgrogers
# and branch will be embedded in the built executable and print out when gpgpu-sim runs
2017-05-09Fix next block addr to link predicate ret block to consecutive blockMengchi Zhang
The block containing predicate ret instruction should add the consecutive block to its successor_ids set. next_addr should be assigned with current instruction address add instruction size instead of 1. Signed-off-by: Mengchi Zhang <[email protected]>
2016-09-06Merge pull request #30 from sspenst/devgpgpu-sim
shfl instruction implemented
2016-09-05Merge pull request #28 from jwang323/cdp_cleangpgpu-sim
Initial support of CUDA Dynamic Parallelism on GPGPUSim
2016-09-02MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0Jin Wang
2016-08-25OCDsspenst
2016-08-25Fixed minor shfl bugssspenst
2016-08-24Cleanupsspenst
2016-08-24Added shfl instructionsspenst
2016-07-06ADD: add knob to enable CDP in gpgpusim configJin Wang
2016-07-06BUG: extra bracketJin Wang
2016-07-06BUG: wrong declaration for m_args_aligned_sizeJin Wang
2016-07-06ADD: print kernel parameter size footprint. BUG: concurrent kernels on same ↵Jin Wang
shader, should use hw_cta_id to store shared mem info
2016-07-06ADD: add stats for kernel launching and complete cycleJin Wang
2016-07-06ADD: add separate cdp latencyJin Wang
2016-07-06ADD: add cdp latencyJin Wang
2016-07-05ADD: launch all device kernels at once in functional simulatorJin Wang
2016-07-05MOD: compute child parameter sizeJin Wang
2016-07-05MOD: schedule one child kernel each cycleJin Wang
2016-07-05BUG: PTX section id. ADD: cudaDeviceSetLimit. BUG: parameter addresses for ↵Jin Wang
child kernels in CDP. BUG: .weak .entry and .weak .global directives in ptx file. BUG: empty_protected() for stream manager causes deadlock, change to empty()
2016-07-05BUG: kernels should return to stream if not pushed to concurrent kernel poolJin Wang
2016-07-05ADD: add support for cudaStreamCreateWithFlagsJin Wang
2016-07-05BUG: multiple child kernels finishJin Wang
2016-07-05BUG: do not handle cudaGetParameterBufferV2 and cudaLaunchDeviceV2 as ↵Jin Wang
call.uni in reconvergence
2016-07-05BUG: parameter alignmentJin Wang
2016-07-05MOD: add child kernel stream and scheduling supportJin Wang
2016-07-05ADD: add cudaGetParameterBufferV2 and add cudaLaunchDeviceV2 implementation. ↵Jin Wang
Kernel launch to stream not yet implemented
2016-07-05ADD: initial support for instruction group used by CDPJin Wang
2016-07-05ADD: handle child kernel name in mov instruction. ADD: detect call ↵Jin Wang
cudaGetParameterBufferV2 and call cudaLaunchDeviceV2
2016-07-05ADD: support ptxinfo for sm_35 and cuda 6.5Jin Wang
2016-07-04Restored madp instruction.speverel
2016-07-04Reverted part of the previous commit so that our new changes related to DNNs ↵sspenst
can be done in a different branch
2016-06-16Added the ability to inject arbitrary PTX instructions. ↵speverel
This will be used to add custom instructions in the future; the imaginary instructions 'spr' and 'ama' have been added as samples.
2016-06-13If ptxas notices any duplicate errors, they now automatically get resolved ↵sspenst
and the program continues with the duplicate function/variable declarations removed.
2016-06-07The ptx parser now recognizes the NC option for ld.global, however this ↵sspenst
option is not actually implemented
2016-06-06Added support for BFE (Bit field extract) instruction.speverel
2016-06-03Added support for %laneid SFR. Also added a notice clarifying that power ↵speverel
modeling for GTX750Ti is currently completely untested and should not be considered supported.
2016-06-02Updated parser and config file to support compute versions up to 5.2. Full ↵speverel
support is NOT claimed; however, it has been tested to work on a number of CUDA version 7.5 benchmarks such as matrix multiply and simpleMultiGPU.
2016-06-02Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵speverel
changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information.
2016-05-13changed gpgpu_ptxinfo_load_from_string definition for Ahmedsspenst
2016-05-13changed the SM version flag for generating ptxinfo to be dynamic instead of 20sspenst
2015-06-05Fixing bug with local stats not being reset on call to update_stats. Added ↵Tayler Hetherington
code to remove the trailing newline character from the C++ name de-mangling fix. Also, fixed small bug with previous commit
2015-06-05Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵Tayler Hetherington
with spaces (e.g., using templates)
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