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path: root/src/gpgpu-sim/addrdec.h
AgeCommit message (Collapse)Author
2020-06-01moving all ipoly equstions to one fileMahmoud
2020-05-23code refomrattingMahmoud
2020-05-23Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-traces
2019-10-16fixing the IPOLY L2 and Dram indexingMahmoud
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Add src/gpgpu-sim formattingNick
2019-08-26Fix a bunch of outstanding warnings and undefined behaviorNick
2019-04-11adding some stats and random hashingMahmoud
2018-08-29improving code quality 2Mahmoud
2018-06-15memory partition indexingMahmoud
2014-08-14Fixing the intra-partition address calculation so that every set in L2 cache ↵Wilson Fung
is used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16904]
2014-08-14Redesigned the memory partition unit to support multiple L2 cache banks per ↵Wilson Fung
partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613]
2014-08-14Fixed bug 137. Now memory address mapping with non-power-of-two memory ↵Wilson Fung
partitions will not lead to address aliasing. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11574]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2010-10-241. adding top level configuration class and making shader and memory ↵Tor Aamodt
configuration components of this class. 2. clock memory pipeline no. subwarp times for each shader clock and increase rob-size for texture cache (trying to improve correlation, currently at 0.9218) 3. start to modify shader stats to add back features for visualizer (warp divergence distribution kind of working again) passing cuda 3.1 regression and ptxplus correlation tests [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909]
2010-10-161. moving address decoding into a class (and out of cache entirely)Tor Aamodt
2. moving DRAM timing parameters into memory_config class 3. removing some likely useless statistics 4. other cleaning up of code passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7868]
2010-08-10refactor: mostly finished getting rid of extern declTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7183]
2010-07-15creating branch for adding support for CUDA 3.x and FermiTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]
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