weft - CPEN 511 Project - Weft: Improving SIMD Utilization through MIMD-like Co-issue and Thread Compaction

Age	Commit message (Collapse)	Author
2010-10-18	Re-designed cache model:	Tor Aamodt
	- read only cache model with integrated mshrs (no L1D, yet); new cache interface should be easily extendable to support texture cache with latency fifo and separate tag/data arrays, though this is not yet added (currently tags and data arrays are not decoupled for texture) - new partition model using the above removes all old MSHRs, L1D etc... passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7875]
2010-10-02	refactoring: make shd_cache_t into a class (cache_t), plus some other ↵	Tor Aamodt
	cleaning up [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7806]
2010-10-01	integrating recent changes from fermi-test into fermi	Tor Aamodt
	(i'll use "fermi" for more disruptive changes to the pipeline model such as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
2010-07-17	- add support for cvta and isspacep instructions (currently assuming	Tor Aamodt
	a fixed address mapping between shared,local to generic that depends upon hardware thread context used... might be interesting to explore tradeoffs at some point) - remove util.h... we don't need TRUE, FALSE anymore now that everything is C++ - remove some dead code from shader_decode [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6867]
2010-07-15	creating branch for adding support for CUDA 3.x and Fermi	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]