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path: root/src/gpgpu-sim/gpu-cache.h
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2019-09-23fixing reformattingMahmoud
2019-09-16Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-09-13Seems like multiple passes for reformatting commentsNick
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Revert "Add additional formatting pass on directories"Nick
This reverts commit ca563ea85ead434e0d579026b5e66e829af5efe5.
2019-09-13Add additional formatting pass on directoriesNick
2019-09-13Add src/gpgpu-sim formattingNick
2019-08-30Merge branch 'dev-nvidia' into dev-privateMahmoud
2019-08-30update the adaptive cache behaviour and make L1 fully assoc in VoltaMahmoud
2019-08-26Merge branch 'dev-nvidia' into dev-privateMahmoud
2019-08-26Banked L1, adding iSLIP and RR arbiteratio and adding some commentsMahmoud
2019-06-19Merge remote-tracking branch 'upstream/dev' into devtgrogers
2019-06-19Merge pull request #96 from CoffeeBeforeArch/AerialVision_cache_supportTim Rogers
AerialVision L2 Cache Support
2019-05-26Merge pull request #1 from gpgpu-sim/devMengchi Zhang
Dev
2019-05-21fix bugs in tag() and some other functionJiangqiu Shen
2019-05-15make gpu_tot_cycle local variable not global variableMahmoud
2019-05-13Merge branch 'dev' into AerialVision_cache_supportTim Rogers
2019-05-07enable FEM and fixed indentationMahmoud
2019-04-25increase stat counter size to long longMahmoud
2019-02-20Add full support for deprecated AerialVision L2 statsNick
2019-02-19Add initial infrastrucutre to support L2 (and other) cache statistics for ↵Nick
AerialVision
2018-10-11count misses of pending req as sector miss in streaming cacheMahmoud
2018-10-11Merge branch 'dev-purdue-integration' of ↵Mahmoud
https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration
2018-10-11improving the performance of cache flushingMahmoud
2018-10-11Merge branch 'dev-purdue-integration' into dev-purdue-integrationTimothy G Rogers
2018-10-09adding adaptive volta cache configMahmoud
2018-10-09Adding in an occupancy metric to match the nvprof metrictgrogers
2018-10-08fixing an error about address length in the cachetgrogers
2018-09-07adding streamin cache + fixing TEX cache + adding l1 latency and smem latencyMahmoud
2018-08-27improving code qualityMahmoud
2018-08-22adding lazy-fetch-on-read and invalidate operation to cacheMahmoud
2018-06-15memory partition indexingMahmoud
2018-03-12fixibg sectir l1 deadlock bugMahmoud
2017-11-19Doing lazy fetch-on-read policyMahmoud
2017-11-18removing another asserttgrogers
2017-11-18Getting rid of another assert that crops up cause of our memcpy and L2 ↵tgrogers
interaction
2017-11-18vectoradd is successfully filling the l2tgrogers
2017-10-11Merge branch 'dev-purdue-integration' of ↵Mahmoud
https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration
2014-08-14- Code review 1173001Tayler Hetherington
- Added a parameter to the cache configuration to configure the set index function. - Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
2014-08-14Review 77001: Fixing Writeback/Write allocate hard coded memory_access_types ↵Tayler Hetherington
for specific caches. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16683]
2014-08-14Adding bandwidth modeling to the cache model.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671]
2014-08-14Integrating changes from my personal branch.Tim Rogers
Main contribution is a static warp limiting scheduler. There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines Review ID: 36001 lgtm: 1 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580]
2014-08-14Fixing pending_hit bug (Access is supposed to return MISS, but stats should ↵Tayler Hetherington
increment HIT_RESERVED). Reviewed in person by Tim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16460]
2014-08-14Fixing compilation bug in CL16452. Tested with gcc version 4.2.1 and 4.3.4.Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16453]
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵Tayler Hetherington
statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
2014-08-14make sure L1 cache is flushed at a configuration change between kernels, ↵Ahmed El-Shafiey
even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834]
2014-08-14 - Adding support for cudaFuncSetCacheConfig API, that allows changing theAhmed El-Shafiey
L1 Cache and Shared Memory configurations across kernels. The support enable the user to specify two more configurations (Preferred L1) or (Preferred Shared Memory) besides the default config. If the cudaFuncSetCacheConfig API is used to set the cache configuration of a specific kernel to either of these configuration (cudaFuncCachePreferShared, cudaFuncCachePreferL1), the simulator will change the cache configuration at kernel launch accordingly, if there is no alternative configurations provided to the simulator it will use the default configurations with a warning message display [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15816]
2014-08-14Replaced the legacy L2 cache access stats with more meaningful breakdown ↵Wilson Fung
that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784]
2014-08-14Cleaning up the interconnection core to memory partition statisticsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15745]
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