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path: root/src/gpgpu-sim/gpu-cache.h
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2024-08-21Stream stats (#71)JRPan
* Temp commit for Justin and Cassie to sync on code changes for adding per-stream status. * Resolved compile errors. * Removed redundant parameter * Passed cuda_stream_id from accelsim to gpgpusim * Cleaned up unused changes * Changed vector to map, having operator problems. * StreamID defaults to zero * Implemented streams to inc_stats and so on * Fixed TOTAL_ACCESS counts * Implemented GLOBAL_TIMER. * Fixed m_shader->get_kernel SEGFAULT issue in shader.cc. * Use warp_init to track streamID instead of issue_warp * Removed temp debug print * Modified cache_stats to only print data from latest finished stream Added optional arg to cache_stats::print_stats, cache_stats::print_fail_stats and their upstream functions. When streamID is specified, print stats from that stream. When not specified, print all stats. NOTE: current implementation depending on streamid never equals -1 * Removed default arg values of streamID * modified constructor of mem_fetch to pass in streamID * changed get_streamid to get_streamID * Added TODO to gpgpusim_entrypoint.cc and power_stat.cc * Only collect power stats when enabled * print last finished stream in PTX mode using last_streamID * take out additional printf * Add a field to baseline cache to indicate cache level * save gpu object in cache * Print stream ID only once per kernel * rm test print * use -1 for default stream id * cleanup debug prints * remove GLOABL_TIMER * Automated clang-format * Should be correct to print everything in power model * addressing concerns & errors * Automated clang-format * add m_stats_pw in operator+ * Automated Format --------- Co-authored-by: Justin Qiao <[email protected]> Co-authored-by: Justin Qiao <[email protected]> Co-authored-by: Tim Rogers <[email protected]> Co-authored-by: JRPan <[email protected]> Co-authored-by: purdue-jenkins <[email protected]>
2024-07-16Auto clang format (#74)Aaron Barnes
* add automated clang formatter * Automated clang-format * use /bin/bash and add print * use default checkout ref * Format only after tests are success * Run CI on merge group --------- Co-authored-by: barnes88 <[email protected]> Co-authored-by: JRPAN <[email protected]>
2023-07-05Merge branch 'dev' into all_warnAhmad Alawneh
2023-06-17137 drop sector cache flexibility (#57)Fangjia Shen
Addresses accel-sim issue 137. For sector cache, the sector size must be 32B (hard-coded and not configurable) and cache line size must be set to 128B; a runtime parameter check will terminate simulation if the cache line size is not 128B.
2023-06-12no return warnings ngs fixAhmad Alawneh
2022-02-01Update CopyrightsJRPAN
2021-10-17AccelWattch dev IntegrationVijayKandiah
2021-06-03update readableJRPAN
2021-05-23format codeMahmoud Khairy A. Abdallah
2021-05-20fix merge conflictJRPAN
2021-05-19eliminate redundant code in gpu-cache.hMahmoud Khairy A. Abdallah
2021-05-19rename set_dirty_byte_maskMahmoud Khairy A. Abdallah
2021-05-19moving the unified size from the base class config to l1 configMahmoud Khairy A. Abdallah
2021-05-19moving shmem option to the base class and change the code to accept turing ↵Mahmoud Khairy A. Abdallah
config
2021-05-19fixing the failing of mergingMahmoud Khairy A. Abdallah
2021-05-19Merge branch 'dev' of https://github.com/accel-sim/gpgpu-sim_distribution ↵Mahmoud Khairy A. Abdallah
into dev
2021-05-19Merge branch 'dev' into adaptive-cacheJRPan
2021-05-19Use cache config multipilier when possibleJRPAN
2021-05-19minor improvementsJRPAN
2021-05-19re-wording/formattingJRPAN
2021-05-18adaptive cache - updateJRPAN
2021-05-18new configs - adaptive cache and cache write ratioJRPAN
2021-05-18Add WT to lazy_fetch_on_readJRPAN
2021-05-18check sector readable only on readsJRPAN
2021-05-18set byte mask on fillJRPAN
2021-05-18sending byte mask for all policiesJRPAN
2021-05-18sending cache block byte maskJRPAN
2021-05-18store ack for new wapsJRPAN
2021-05-18dirty counter added. NO increamenting yetJRPAN
2021-05-15adding the missing xoring hashingMahmoud Khairy A. Abdallah
2021-05-15fixing streaming cache based on recent ubenchMahmoud Khairy A. Abdallah
2021-02-17fix hash funcitonJRPAN
2020-11-22Merge pull request #6 from JRPan/add_mshrmkhairy
added MSHR_HIT
2020-11-15added MSHR_HITJRPAN
2020-10-26Fix for bugs in lazy write handlingGwen
2020-06-01moving all ipoly equstions to one fileMahmoud
2019-09-23fixing reformattingMahmoud
2019-09-16Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-09-13Seems like multiple passes for reformatting commentsNick
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Revert "Add additional formatting pass on directories"Nick
This reverts commit ca563ea85ead434e0d579026b5e66e829af5efe5.
2019-09-13Add additional formatting pass on directoriesNick
2019-09-13Add src/gpgpu-sim formattingNick
2019-08-30Merge branch 'dev-nvidia' into dev-privateMahmoud
2019-08-30update the adaptive cache behaviour and make L1 fully assoc in VoltaMahmoud
2019-08-26Merge branch 'dev-nvidia' into dev-privateMahmoud
2019-08-26Banked L1, adding iSLIP and RR arbiteratio and adding some commentsMahmoud
2019-06-19Merge remote-tracking branch 'upstream/dev' into devtgrogers
2019-06-19Merge pull request #96 from CoffeeBeforeArch/AerialVision_cache_supportTim Rogers
AerialVision L2 Cache Support
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