| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-03-31 | Merge commit '89db73061e043c26df22c7f18d9adb106d8078ac' into ↵ | tgrogers | |
| dev-purdue-integration | |||
| 2018-03-31 | Getting rid of our constant, annoying prints. Running workloads of any size ↵ | tgrogers | |
| causes ridiculous output file sizes | |||
| 2018-03-30 | fixing gpu-tot-cycle bug | Mahmoud | |
| 2018-03-28 | Fixing a minor typo in an old config | tgrogers | |
| 2018-03-28 | adding new stats counter | Mahmoud | |
| 2018-03-28 | Merge branch 'dev-purdue-integration' of ↵ | Mahmoud | |
| https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration | |||
| 2018-03-28 | adding new counters for parition level para and L2 BW | Mahmoud | |
| 2018-03-26 | Merge branch 'dev-purdue-integration' into dev-purdue-integration | Timothy G Rogers | |
| 2018-03-26 | Fixing resources limitation assertion for compute cab 61 | Mahmoud | |
| 2018-03-25 | Need to make sure we don't kill the L1 too | tgrogers | |
| 2017-11-18 | copy to the L2 by default | tgrogers | |
| 2017-11-18 | fixing the cycle issues with using the cudamemcpies | tgrogers | |
| 2017-11-18 | 64-address used on the CPU side, but GPGPU-Sim Truncates it to 32-bit.... ↵ | tgrogers | |
| truncating the address here fixes the issue and we start propoerly hitting in the L2 | |||
| 2017-11-18 | fixing a stupid inheritance bug | tgrogers | |
| 2017-11-18 | Making the perf sim copy optional, getting rid of an assert that will happen ↵ | tgrogers | |
| with the new hack and incrementing the cycle so that cudamemcopies take some time (if we don't do this the LRU in the cache does not work) | |||
| 2017-11-18 | vectoradd is successfully filling the l2 | tgrogers | |
| 2017-10-30 | adding new stats and change the PascalP100-HBM config | Mahmoud | |
| 2017-10-27 | add more statistics and chaging Pascal config | Mahmoud | |
| 2017-10-26 | Changing the Titan X config file to use the last modifications | Mahmoud | |
| 2017-10-25 | The commits includes: | Mahmoud | |
| 1- REEAD/WERITE buffer for DRAM 2- Fixing FETCH_ON_WRITE cahce policy bug | |||
| 2017-10-13 | ensure that first launch uses simt cluster 0 | Mahmoud | |
| 2017-10-11 | Merge branch 'dev-purdue-integration' of ↵ | Mahmoud | |
| https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration | |||
| 2017-09-14 | adding some condig comments | Mahmoud | |
| 2017-09-13 | Adding sperate dp_unit | Mahmoud | |
| 2017-09-12 | Adding HBM model | Mahmoud | |
| 2017-07-17 | Fixing some typos and adding comments | Mahmoud | |
| 2017-07-17 | Improving GPU core model. This commits contains: | Mahmoud | |
| 1- round robin inst issue for warp multiple schedulers 2- add sector mask in the memory request (to bused later for L2 sector cache) 3- Adding Fermi coalescer 4- Ensure different exen units are used in dual_issue mode 5- Report how many dual_issue happened 6- Adding oldest_first scheduler | |||
| 2016-09-02 | BUG: concurrent kernel on the same SMX does not work with non-legacy local ↵ | Jin Wang | |
| memory mapping, turn off by default | |||
| 2016-09-02 | MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0 | Jin Wang | |
| 2016-07-06 | ADD: add knob to enable CDP in gpgpusim config | Jin Wang | |
| 2016-07-06 | MOD: modify to new structure name gpgpu_ptx_sim_info | Jin Wang | |
| 2016-07-06 | ADD: add kernel launching latency from stream to distributor | Jin Wang | |
| 2016-07-06 | ADD: print kernel parameter size footprint. BUG: concurrent kernels on same ↵ | Jin Wang | |
| shader, should use hw_cta_id to store shared mem info | |||
| 2016-07-06 | ADD: add stats for kernel launching and complete cycle | Jin Wang | |
| 2016-07-06 | BUG: concurrent kernels on same SM may occupy warps from running CTAs | Jin Wang | |
| 2016-07-06 | BUG: for concurrent kernels on same shader, should select kernel from the ↵ | Jin Wang | |
| distributor directly | |||
| 2016-07-06 | ADD: support concurrent kernels on one shader | Jin Wang | |
| 2016-07-05 | MOD: schedule one child kernel each cycle | Jin Wang | |
| 2016-07-05 | MOD: add child kernel stream and scheduling support | Jin Wang | |
| 2015-06-05 | Fixing bug with local stats not being reset on call to update_stats. Added ↵ | Tayler Hetherington | |
| code to remove the trailing newline character from the C++ name de-mangling fix. Also, fixed small bug with previous commit | |||
| 2015-06-05 | Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵ | Tayler Hetherington | |
| with spaces (e.g., using templates) | |||
| 2014-08-14 | Support for named bariers + bar.red + bar.arrive instructions | Ahmed El-Shafiey | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452] | |||
| 2014-08-14 | Refactoring: | Dongdong Li | |
| 1. Decouple the constructor of interconnect interface 2. Some type changed to unsigned from int Fixed Bug: wrong variable in InterconnectInterface::Busy() Review: 83001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16877] | |||
| 2014-08-14 | Intesim2 Integration | Dongdong Li | |
| Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747] | |||
| 2014-08-14 | Adding bandwidth modeling to the cache model. | Wilson Fung | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671] | |||
| 2014-08-14 | Redesigned the memory partition unit to support multiple L2 cache banks per ↵ | Wilson Fung | |
| partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613] | |||
| 2014-08-14 | Adding option to force global memory accesses to skip L1 data cache while ↵ | Wilson Fung | |
| still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601] | |||
| 2014-08-14 | Adding new option '-liveness_message_freq', which throttles the frequency of ↵ | Wilson Fung | |
| simulation liveness printout (default to 1 per second in wall clock time). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16482] | |||
| 2014-08-14 | Fixing bug in printing - Not checking if cache was instantiated (i.e., L1D ↵ | Tayler Hetherington | |
| for Quadro config). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16457] | |||
| 2014-08-14 | Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵ | Tayler Hetherington | |
| statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452] | |||
