| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-11-09 | Adding checkpoint support | Deval Shah | |
| 2018-11-09 | resolving merge conflicts | Deval Shah | |
| 2018-11-09 | resolving merge conflict | Deval Shah | |
| 2018-11-03 | merged with memory subsytem. Regression is passing but tensorcore kernel is ↵ | aamir | |
| stuck in deadlock | |||
| 2018-10-26 | made the changes compatible with old config files | Md Aamir Raihan | |
| 2018-10-24 | merged tensor-cores code | aamir | |
| 2018-09-22 | debug prints | aamir | |
| 2018-08-16 | Timing model for VCORE | negargoli93 | |
| 2018-07-16 | fix pipline for tensor_core and change config | negargoli93 | |
| 2018-06-20 | Tensor core timing model | negargoli93 | |
| 2018-05-21 | Merged in suchitapati/gpgpusim-cudnn-05-01-18 (pull request #7) | Suchita Pati | |
| Support for -gpgpu_registers_per_block and addition of -save_embedded_ptx 1 to config files for mnistCUDNN Approved-by: tgrogers-purdue <[email protected]> | |||
| 2018-05-09 | Merge remote-tracking branch 'public/dev' into dev | tgrogers | |
| 2018-05-02 | Minor change in config description | Suchita Pati | |
| 2018-05-01 | Added support for -gpgpu_registers_per_block config | Suchita Pati | |
| 2018-04-11 | Merge remote-tracking branch 'upstream/dev' into dev | tgrogers | |
| 2018-04-10 | added config -gpgpu_shmem_per_block and fixed cudaGetDeviceAttributes function | Suchita Pati | |
| 2018-04-05 | fixing gpu-tot-cycle bug | Mahmoud | |
| 2018-04-05 | adding new stats counter | Mahmoud | |
| 2018-04-05 | adding new counters for parition level para and L2 BW | Mahmoud | |
| 2018-03-31 | Getting rid of our constant, annoying prints. Running workloads of any size ↵ | tgrogers | |
| causes ridiculous output file sizes | |||
| 2018-03-28 | Fixing a minor typo in an old config | tgrogers | |
| 2018-03-26 | Provide portable (non-x86) breakpoint method which should work on all ↵ | Nathan Conrad | |
| linuxes. Tested on PowerPC. | |||
| 2017-08-17 | Merged all work on the dev branch since the divergence point into the dnn ↵ | speverel | |
| branch, incorporating Dynamic Parallelism and many bug fixes. | |||
| 2016-09-02 | BUG: concurrent kernel on the same SMX does not work with non-legacy local ↵ | Jin Wang | |
| memory mapping, turn off by default | |||
| 2016-09-02 | MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0 | Jin Wang | |
| 2016-07-06 | Added the ability to load from sstarr memory after data has been stored in it | sspenst | |
| 2016-07-06 | ADD: add knob to enable CDP in gpgpusim config | Jin Wang | |
| 2016-07-06 | MOD: modify to new structure name gpgpu_ptx_sim_info | Jin Wang | |
| 2016-07-06 | ADD: add kernel launching latency from stream to distributor | Jin Wang | |
| 2016-07-06 | ADD: print kernel parameter size footprint. BUG: concurrent kernels on same ↵ | Jin Wang | |
| shader, should use hw_cta_id to store shared mem info | |||
| 2016-07-06 | ADD: add stats for kernel launching and complete cycle | Jin Wang | |
| 2016-07-06 | BUG: concurrent kernels on same SM may occupy warps from running CTAs | Jin Wang | |
| 2016-07-06 | BUG: for concurrent kernels on same shader, should select kernel from the ↵ | Jin Wang | |
| distributor directly | |||
| 2016-07-06 | ADD: support concurrent kernels on one shader | Jin Wang | |
| 2016-07-05 | MOD: schedule one child kernel each cycle | Jin Wang | |
| 2016-07-05 | MOD: add child kernel stream and scheduling support | Jin Wang | |
| 2015-06-05 | Fixing bug with local stats not being reset on call to update_stats. Added ↵ | Tayler Hetherington | |
| code to remove the trailing newline character from the C++ name de-mangling fix. Also, fixed small bug with previous commit | |||
| 2015-06-05 | Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵ | Tayler Hetherington | |
| with spaces (e.g., using templates) | |||
| 2014-08-14 | Support for named bariers + bar.red + bar.arrive instructions | Ahmed El-Shafiey | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452] | |||
| 2014-08-14 | Refactoring: | Dongdong Li | |
| 1. Decouple the constructor of interconnect interface 2. Some type changed to unsigned from int Fixed Bug: wrong variable in InterconnectInterface::Busy() Review: 83001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16877] | |||
| 2014-08-14 | Intesim2 Integration | Dongdong Li | |
| Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747] | |||
| 2014-08-14 | Adding bandwidth modeling to the cache model. | Wilson Fung | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671] | |||
| 2014-08-14 | Redesigned the memory partition unit to support multiple L2 cache banks per ↵ | Wilson Fung | |
| partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613] | |||
| 2014-08-14 | Adding option to force global memory accesses to skip L1 data cache while ↵ | Wilson Fung | |
| still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601] | |||
| 2014-08-14 | Adding new option '-liveness_message_freq', which throttles the frequency of ↵ | Wilson Fung | |
| simulation liveness printout (default to 1 per second in wall clock time). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16482] | |||
| 2014-08-14 | Fixing bug in printing - Not checking if cache was instantiated (i.e., L1D ↵ | Tayler Hetherington | |
| for Quadro config). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16457] | |||
| 2014-08-14 | Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵ | Tayler Hetherington | |
| statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452] | |||
| 2014-08-14 | Further cleaning up power stats - Continuation of issue 35001. | Tayler Hetherington | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16437] | |||
| 2014-08-14 | Fixing interconnect stats bug | Tayler Hetherington | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16428] | |||
| 2014-08-14 | make sure L1 cache is flushed at a configuration change between kernels, ↵ | Ahmed El-Shafiey | |
| even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834] | |||
