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2015-06-05Fixing bug with local stats not being reset on call to update_stats. Added ↵Tayler Hetherington
code to remove the trailing newline character from the C++ name de-mangling fix. Also, fixed small bug with previous commit
2015-06-05Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵Tayler Hetherington
with spaces (e.g., using templates)
2015-03-05Merge pull request #9 from ElTantawy/masterandrewboktor
initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK running
2015-03-04initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK runningAhmed ElTantawy
2015-02-19Adding an assert to make sure we got the right instruction backAndrew Boktor
2015-02-18Making sure that we only service returning cache misses when we have a place ↵Andrew Boktor
to fetch into.
2015-02-18Fixing icache bug where for each miss we also count a hit.Andrew Boktor
2014-10-06Fixed mac build failsMyrice
1. ptx_sim.h::473, stack cannot use incomplete type "operand_info" which is a forward declaration. The reason is underlying implementation of stack is deque which need a complete type. It is better to remove forward declaration by break circular dependence for future fixes. It is also benefit unit test 2. shader.h::1334, this hack cannot pass clang. Clang does not allow a array with not a explicit size. Please fix this hack by correct implementation as soon as possible 3. The default parameter causes clang to fail because it frustrate the compiler. This is still under discussion whether such implementation is correct. http://stackoverflow.com/questions/18313509/default-argument-gcc-vs-clang. I changed it to two constructors to avoid confusion.
2014-08-14-Forcing make clean to remove all automatically generated files by parsers ↵Ahmed El-Shafiey
(should fix regressions). -remove some printfs that were there for debugging [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18480]
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14- Code review 1173001Tayler Hetherington
- Added a parameter to the cache configuration to configure the set index function. - Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
2014-08-14warning fixes 2nd patch, including comments removal and strict aliasing fixes.leonyu
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183]
2014-08-14Bug FIX: icnt::full() check using wrong mf sizeDongdong Li
Review ID: 89001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17086]
2014-08-14Fixing assertion that occurs when L1 cache is configured with ↵Wilson Fung
write-allocation policy. Also added description for the write-allocation fix implemented by Tayler. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16914]
2014-08-14Fixing the intra-partition address calculation so that every set in L2 cache ↵Wilson Fung
is used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16904]
2014-08-14Refactoring:Dongdong Li
1. Decouple the constructor of interconnect interface 2. Some type changed to unsigned from int Fixed Bug: wrong variable in InterconnectInterface::Busy() Review: 83001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16877]
2014-08-14Adding the ability to trace all the shader coresTim Rogers
Review ID: 75001 lgtm: 2 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16758]
2014-08-14Intesim2 IntegrationDongdong Li
Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747]
2014-08-14Review 77001: Fixing Writeback/Write allocate hard coded memory_access_types ↵Tayler Hetherington
for specific caches. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16683]
2014-08-14Adding bandwidth modeling to the cache model.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671]
2014-08-14Lengthened the DRAM return queue size to have enough credits in order to ↵Wilson Fung
keep the DRAM utilized. Also extended the state printing function to print out mem_fetch entries inside the DRAM delay queue. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16639]
2014-08-14Fix for bug 63. bk[i]->n_idle should be bk[j]->n_idle instead.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16635]
2014-08-14Redesigned the memory partition unit to support multiple L2 cache banks per ↵Wilson Fung
partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613]
2014-08-14Adding option to force global memory accesses to skip L1 data cache while ↵Wilson Fung
still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601]
2014-08-14Integrating changes from my personal branch.Tim Rogers
Main contribution is a static warp limiting scheduler. There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines Review ID: 36001 lgtm: 1 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580]
2014-08-14Review 62001: Fixing bug where labels "WarpIssueSlotBreakdown" and ↵Tayler Hetherington
"WarpIssueDynamicIdBreakdown" are being printed in the visualization files without any data. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16572]
2014-08-14Adding the ability to querry the WARPSZ flag from the ptx script.Tim Rogers
Also changed some initialization code when cores are created in both the funcational and perfromance simulator review:3001 lgtm:5 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506]
2014-08-14 Changing the make flow so all the generated files, both object and code ↵Tim Rogers
generated go in a directory independent of the source directory [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16503]
2014-08-14Interconnection traffic breakdown stats (integration from TM branch).Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495]
2014-08-14Adding new option '-liveness_message_freq', which throttles the frequency of ↵Wilson Fung
simulation liveness printout (default to 1 per second in wall clock time). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16482]
2014-08-14Fixing ":" to "=" in shader_print_cache_stats. This will not affect the ↵Tayler Hetherington
regressions butwill cause the correlation to fail due to a change in the output - need to update gold files on failure. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16477]
2014-08-14Fixing pending_hit bug (Access is supposed to return MISS, but stats should ↵Tayler Hetherington
increment HIT_RESERVED). Reviewed in person by Tim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16460]
2014-08-14Fixing bug in printing - Not checking if cache was instantiated (i.e., L1D ↵Tayler Hetherington
for Quadro config). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16457]
2014-08-14Fixing deadlock bug for CL16452Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16456]
2014-08-14Fixing compilation bug in CL16452. Tested with gcc version 4.2.1 and 4.3.4.Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16453]
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵Tayler Hetherington
statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
2014-08-14Further cleaning up power stats - Continuation of issue 35001.Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16437]
2014-08-14Fixing interconnect stats bugTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16428]
2014-08-14Fixing bug 59 + cleaning some code related to the power modelAhmed El-Shafiey
Review ID:32001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205]
2014-08-14make sure L1 cache is flushed at a configuration change between kernels, ↵Ahmed El-Shafiey
even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834]
2014-08-14 Removing the default printing of the dynamic warp distribution histogram ↵Tim Rogers
at the end of every kenerl [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15830]
2014-08-14initialize the shared_memory_sizeAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15817]
2014-08-14 - Adding support for cudaFuncSetCacheConfig API, that allows changing theAhmed El-Shafiey
L1 Cache and Shared Memory configurations across kernels. The support enable the user to specify two more configurations (Preferred L1) or (Preferred Shared Memory) besides the default config. If the cudaFuncSetCacheConfig API is used to set the cache configuration of a specific kernel to either of these configuration (cudaFuncCachePreferShared, cudaFuncCachePreferL1), the simulator will change the cache configuration at kernel launch accordingly, if there is no alternative configurations provided to the simulator it will use the default configurations with a warning message display [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15816]
2014-08-14Updating ICNT stat collectionTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15788]
2014-08-14Replaced the legacy L2 cache access stats with more meaningful breakdown ↵Wilson Fung
that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784]
2014-08-14fixing a bug in the interconnect stats was introduced in CL15746Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15781]
2014-08-14Updating mem_fetch::get_num_flits() to work with atomicsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15760]
2014-08-14Cleaning up interconnection network memory partition to core statistics. Now ↵Tayler Hetherington
counting the number of flits arriving at the cores instead of the number of flits leaving each memory partition. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15746]
2014-08-14Cleaning up the interconnection core to memory partition statisticsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15745]
2014-08-14correcting the allocation of n_simt_to_mem/n_mem_to_simt statsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15699]
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