path: root/src/gpgpu-sim/scoreboard.cc

// Copyright (c) 2009-2011, Tor M. Aamodt, Inderpreet Singh
// The University of British Columbia
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution. Neither the name of
// The University of British Columbia nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.

#include "scoreboard.h"
#include "../cuda-sim/ptx_sim.h"
#include "gpu-sim.h"
#include "shader.h"
#include "shader_trace.h"

// Constructor
Scoreboard::Scoreboard(unsigned sid, unsigned n_warps, class gpgpu_t* gpu,
                       unsigned mode)
    : longopregs() {
  m_sid = sid;
  m_mode = mode;
  // Initialize size of table
  reg_table.resize(n_warps);
  longopregs.resize(n_warps);
  sec_reg_table.resize(n_warps);
  mask_reg_table.resize(n_warps);
  slot_reg_table.resize(n_warps);
  m_xslot_shadow_mask_table.resize(n_warps);

  m_gpu = gpu;

  m_primary_reserve_calls = 0;
  m_primary_release_calls = 0;
  m_sec_reserve_calls = 0;
  m_sec_release_calls = 0;
  m_sec_clear_calls = 0;
  m_sec_clear_regs_dropped = 0;
  m_primary_total_duration_cycles = 0;
  m_primary_completed_reservations = 0;
  m_primary_max_duration_cycles = 0;
  m_sec_total_duration_cycles = 0;
  m_sec_completed_reservations = 0;
  m_sec_max_duration_cycles = 0;
  m_mask_reserve_inserts = 0;
  m_mask_reserve_inc_refcount = 0;
  m_mask_release_match = 0;
  m_mask_release_nomatch = 0;
  m_mask_release_erase = 0;
}

// Print scoreboard contents
void Scoreboard::printContents() const {
  printf("scoreboard contents (sid=%d): \n", m_sid);
  for (unsigned i = 0; i < reg_table.size(); i++) {
    if (reg_table[i].size() == 0) continue;
    printf("  wid = %2d: ", i);
    std::set<unsigned>::const_iterator it;
    for (it = reg_table[i].begin(); it != reg_table[i].end(); it++)
      printf("%u ", *it);
    printf("\n");
  }
}

void Scoreboard::reserveRegister(unsigned wid, unsigned regnum) {
  if (!(reg_table[wid].find(regnum) == reg_table[wid].end())) {
    printf(
        "Error: trying to reserve an already reserved register (sid=%d, "
        "wid=%d, regnum=%d).",
        m_sid, wid, regnum);
    abort();
  }
  SHADER_DPRINTF(SCOREBOARD, "Reserved Register - warp:%d, reg: %d\n", wid,
                 regnum);
  reg_table[wid].insert(regnum);
  m_primary_reserve_calls++;
  m_primary_resv_cycle[std::make_pair(wid, regnum)] =
      m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
}

// Unmark register as write-pending
void Scoreboard::releaseRegister(unsigned wid, unsigned regnum) {
  if (!(reg_table[wid].find(regnum) != reg_table[wid].end())) return;
  SHADER_DPRINTF(SCOREBOARD, "Release register - warp:%d, reg: %d\n", wid,
                 regnum);
  reg_table[wid].erase(regnum);
  m_primary_release_calls++;
  auto key = std::make_pair(wid, regnum);
  auto it = m_primary_resv_cycle.find(key);
  if (it != m_primary_resv_cycle.end()) {
    unsigned long long now = m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
    unsigned long long dur = now - it->second;
    m_primary_total_duration_cycles += dur;
    m_primary_completed_reservations++;
    if (dur > m_primary_max_duration_cycles)
      m_primary_max_duration_cycles = dur;
    m_primary_resv_cycle.erase(it);
  }
}

const bool Scoreboard::islongop(unsigned warp_id, unsigned regnum) {
  return longopregs[warp_id].find(regnum) != longopregs[warp_id].end();
}

void Scoreboard::reserveRegisters(const class warp_inst_t* inst) {
  if (m_mode == 1) {
    // Mask-aware: insert (reg, inst's active mask, ref_count++) per output.
    const active_mask_t &mask = inst->get_active_mask();
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        reserveRegisterMask(inst->warp_id(), inst->out[r], mask);
      }
    }
  } else if (m_mode == 2) {
    // Slot-pinned: insert into the inst's owning ibuffer half's table.
    unsigned slot = inst->get_ibuffer_half_id();
    assert(slot < NUM_SLOTS);
    const active_mask_t &shadow_mask = inst->get_active_mask();
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        reserveRegisterSlot(inst->warp_id(), slot, inst->out[r]);
        // Mask-aware shadow for diag (sb=1-equivalent ground truth).
        reserveShadowMask(inst->warp_id(), inst->out[r], shadow_mask);
      }
    }
  } else {
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        reserveRegister(inst->warp_id(), inst->out[r]);
        SHADER_DPRINTF(SCOREBOARD, "Reserved register - warp:%d, reg: %d\n",
                       inst->warp_id(), inst->out[r]);
      }
    }
  }

  // Keep track of long operations (longopregs is mode-agnostic — used as a
  // hint by issue eligibility, not for hazard tracking)
  if (inst->is_load() && (inst->space.get_type() == global_space ||
                          inst->space.get_type() == local_space ||
                          inst->space.get_type() == param_space_kernel ||
                          inst->space.get_type() == param_space_local ||
                          inst->space.get_type() == param_space_unclassified ||
                          inst->space.get_type() == tex_space)) {
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        SHADER_DPRINTF(SCOREBOARD, "New longopreg marked - warp:%d, reg: %d\n",
                       inst->warp_id(), inst->out[r]);
        longopregs[inst->warp_id()].insert(inst->out[r]);
      }
    }
  }
}

// Release registers for an instruction
void Scoreboard::releaseRegisters(const class warp_inst_t* inst) {
  if (m_mode == 1) {
    const active_mask_t &mask = inst->get_active_mask();
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        releaseRegisterMask(inst->warp_id(), inst->out[r], mask);
        longopregs[inst->warp_id()].erase(inst->out[r]);
      }
    }
  } else if (m_mode == 2) {
    unsigned slot = inst->get_ibuffer_half_id();
    assert(slot < NUM_SLOTS);
    const active_mask_t &shadow_mask = inst->get_active_mask();
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        releaseRegisterSlot(inst->warp_id(), slot, inst->out[r]);
        // Mask-aware shadow release.
        releaseShadowMask(inst->warp_id(), inst->out[r], shadow_mask);
        longopregs[inst->warp_id()].erase(inst->out[r]);
      }
    }
  } else {
    for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
      if (inst->out[r] > 0) {
        SHADER_DPRINTF(SCOREBOARD, "Register Released - warp:%d, reg: %d\n",
                       inst->warp_id(), inst->out[r]);
        releaseRegister(inst->warp_id(), inst->out[r]);
        longopregs[inst->warp_id()].erase(inst->out[r]);
      }
    }
  }
}

/**
 * Checks to see if registers used by an instruction are reserved in the
 *scoreboard
 *
 * @return
 * true if WAW or RAW hazard (no WAR since in-order issue)
 **/
bool Scoreboard::checkCollision(unsigned wid, const class inst_t* inst) const {
  // Get list of all input and output registers
  std::set<int> inst_regs;

  for (unsigned iii = 0; iii < inst->outcount; iii++)
    inst_regs.insert(inst->out[iii]);

  for (unsigned jjj = 0; jjj < inst->incount; jjj++)
    inst_regs.insert(inst->in[jjj]);

  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);

  // Check for collision, get the intersection of reserved registers and
  // instruction registers
  std::set<int>::const_iterator it2;
  for (it2 = inst_regs.begin(); it2 != inst_regs.end(); it2++)
    if (reg_table[wid].find(*it2) != reg_table[wid].end()) {
      return true;
    }
  return false;
}

bool Scoreboard::pendingWrites(unsigned wid) const {
  if (m_mode == 1) return !mask_reg_table[wid].empty();
  if (m_mode == 2) return !bothSlotsClean(wid);
  return !reg_table[wid].empty();
}

bool Scoreboard::pendingWritesAny(unsigned wid) const {
  return pendingWrites(wid);
}

// Secondary scoreboard methods for intra-warp co-issue

void Scoreboard::reserveRegisterSecondary(unsigned wid, unsigned regnum) {
  // No abort on duplicate — secondary may share register names with primary
  bool inserted = sec_reg_table[wid].insert(regnum).second;
  if (inserted) {
    m_sec_reserve_calls++;
    m_sec_resv_cycle[std::make_pair(wid, regnum)] =
        m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
  }
}

void Scoreboard::releaseRegisterSecondary(unsigned wid, unsigned regnum) {
  size_t n = sec_reg_table[wid].erase(regnum);
  if (n == 0) return;
  m_sec_release_calls++;
  auto key = std::make_pair(wid, regnum);
  auto it = m_sec_resv_cycle.find(key);
  if (it != m_sec_resv_cycle.end()) {
    unsigned long long now = m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
    unsigned long long dur = now - it->second;
    m_sec_total_duration_cycles += dur;
    m_sec_completed_reservations++;
    if (dur > m_sec_max_duration_cycles) m_sec_max_duration_cycles = dur;
    m_sec_resv_cycle.erase(it);
  }
}

bool Scoreboard::checkCollisionSecondary(unsigned wid,
                                          const inst_t *inst) const {
  std::set<int> inst_regs;
  for (unsigned i = 0; i < inst->outcount; i++) inst_regs.insert(inst->out[i]);
  for (unsigned j = 0; j < inst->incount; j++) inst_regs.insert(inst->in[j]);
  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);

  for (auto it = inst_regs.begin(); it != inst_regs.end(); it++)
    if (sec_reg_table[wid].find(*it) != sec_reg_table[wid].end())
      return true;
  return false;
}

void Scoreboard::clearSecondary(unsigned wid) {
  m_sec_clear_calls++;
  m_sec_clear_regs_dropped += sec_reg_table[wid].size();
  // Drop in-flight duration timestamps for any regs we are dropping —
  // these are abandoned reservations (e.g. warp completed, pipeline flush)
  // and counting their duration would skew the histogram.
  for (auto reg : sec_reg_table[wid])
    m_sec_resv_cycle.erase(std::make_pair(wid, reg));
  sec_reg_table[wid].clear();
}

// =====================================================================
// Mode 1: mask-aware scoreboard
// =====================================================================
//
// Each reservation is a (reg, active_mask, ref_count) tuple. Identical
// (reg, mask) reservations are coalesced into one entry with ref_count
// incremented. Hazard detection is mask intersection — an instruction
// with active_mask M collides on register R iff there exists an entry
// (R, M', _) with (M & M').any().
//
// Release is idempotent: matching entry decrements ref_count and is
// erased when ref_count hits zero; mismatch is silently ignored (so
// the existing per-set release loops, which call release once per valid
// set, work without dedup).

void Scoreboard::reserveRegisterMask(unsigned wid, unsigned reg,
                                      const active_mask_t &mask) {
  for (auto &e : mask_reg_table[wid]) {
    if (e.reg == reg && e.mask == mask) {
      e.ref_count++;
      m_mask_reserve_inc_refcount++;
      return;
    }
  }
  mask_resv e;
  e.reg = reg;
  e.mask = mask;
  e.ref_count = 1;
  e.resv_cycle = m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
  mask_reg_table[wid].push_back(e);
  m_mask_reserve_inserts++;
}

void Scoreboard::releaseRegisterMask(unsigned wid, unsigned reg,
                                      const active_mask_t &mask) {
  for (auto it = mask_reg_table[wid].begin();
       it != mask_reg_table[wid].end(); ++it) {
    if (it->reg == reg && it->mask == mask) {
      assert(it->ref_count > 0);
      it->ref_count--;
      m_mask_release_match++;
      if (it->ref_count == 0) {
        mask_reg_table[wid].erase(it);
        m_mask_release_erase++;
      }
      return;
    }
  }
  m_mask_release_nomatch++;
  // No matching entry — idempotent no-op (mirrors legacy releaseRegister).
}

void Scoreboard::releaseSetReg(unsigned wid, unsigned reg,
                                const active_mask_t &mask,
                                bool is_intra_legacy, unsigned slot_id) {
  if (m_mode == 1) {
    releaseRegisterMask(wid, reg, mask);
  } else if (m_mode == 2) {
    releaseRegisterSlot(wid, slot_id, reg);
    // Mask-aware shadow release (per-set writeback path).
    releaseShadowMask(wid, reg, mask);
  } else if (is_intra_legacy) {
    releaseRegisterSecondary(wid, reg);
  } else {
    releaseRegister(wid, reg);
  }
}

// =====================================================================
// Mode 2: slot-pinned scoreboards
// =====================================================================

void Scoreboard::reserveRegisterSlot(unsigned wid, unsigned slot,
                                      unsigned regnum) {
  assert(slot < NUM_SLOTS);
  // Ref-counted: each pending write to (slot, reg) increments. Two
  // back-to-back writes to the same reg from the same slot must both
  // be tracked — the prior set-based impl's idempotent insert lost the
  // second write's pending state when the first retired (same-slot
  // RAW miss). Each releaseRegisterSlot decrements; entry erased at 0.
  slot_reg_table[wid][slot][regnum]++;
}

void Scoreboard::releaseRegisterSlot(unsigned wid, unsigned slot,
                                      unsigned regnum) {
  assert(slot < NUM_SLOTS);
  auto it = slot_reg_table[wid][slot].find(regnum);
  if (it == slot_reg_table[wid][slot].end()) return;  // idempotent
  if (it->second > 1) {
    it->second--;
  } else {
    slot_reg_table[wid][slot].erase(it);
  }
}

// =====================================================================
// Mode 2 mask-aware shadow table (diagnostic only — not used for any
// hazard-detection or stalling decision). Mirrors mask_reg_table's
// semantics so we can compare slot-pinned check vs sb=1 ground truth
// at issue eligibility sites.
// =====================================================================
void Scoreboard::reserveShadowMask(unsigned wid, unsigned reg,
                                   const active_mask_t &mask) {
  if (m_mode != 2) return;
  for (auto &e : m_xslot_shadow_mask_table[wid]) {
    if (e.reg == reg && e.mask == mask) {
      e.ref_count++;
      return;
    }
  }
  mask_resv e;
  e.reg = reg;
  e.mask = mask;
  e.ref_count = 1;
  e.resv_cycle = m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle;
  m_xslot_shadow_mask_table[wid].push_back(e);
}

void Scoreboard::releaseShadowMask(unsigned wid, unsigned reg,
                                   const active_mask_t &mask) {
  if (m_mode != 2) return;
  for (auto it = m_xslot_shadow_mask_table[wid].begin();
       it != m_xslot_shadow_mask_table[wid].end(); ++it) {
    if (it->reg == reg && it->mask == mask) {
      assert(it->ref_count > 0);
      it->ref_count--;
      if (it->ref_count == 0) {
        m_xslot_shadow_mask_table[wid].erase(it);
      }
      return;
    }
  }
  // Idempotent no-op on no match — mirrors releaseRegisterMask.
}

bool Scoreboard::checkCollisionShadow(unsigned wid,
                                      const class inst_t *inst,
                                      const active_mask_t &mask) const {
  if (m_mode != 2) return false;
  std::set<int> inst_regs;
  for (unsigned i = 0; i < inst->outcount; i++) inst_regs.insert(inst->out[i]);
  for (unsigned j = 0; j < inst->incount; j++) inst_regs.insert(inst->in[j]);
  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);
  for (auto reg : inst_regs) {
    if (reg <= 0) continue;
    for (const auto &e : m_xslot_shadow_mask_table[wid]) {
      if (e.reg == (unsigned)reg && (e.mask & mask).any()) {
        return true;
      }
    }
  }
  return false;
}

void Scoreboard::dumpShadowOverlap(unsigned wid, const class inst_t *inst,
                                   const active_mask_t &mask, FILE *out,
                                   const char *site,
                                   unsigned long long cyc) const {
  if (m_mode != 2) return;
  std::set<int> inst_regs;
  for (unsigned i = 0; i < inst->outcount; i++) inst_regs.insert(inst->out[i]);
  for (unsigned j = 0; j < inst->incount; j++) inst_regs.insert(inst->in[j]);
  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);
  for (auto reg : inst_regs) {
    if (reg <= 0) continue;
    for (const auto &e : m_xslot_shadow_mask_table[wid]) {
      if (e.reg == (unsigned)reg && (e.mask & mask).any()) {
        // Lookup which slot has the reg (or both / neither).
        auto it0 = slot_reg_table[wid][0].find((unsigned)reg);
        auto it1 = slot_reg_table[wid][1].find((unsigned)reg);
        unsigned cnt0 = (it0 == slot_reg_table[wid][0].end()) ? 0u : it0->second;
        unsigned cnt1 = (it1 == slot_reg_table[wid][1].end()) ? 0u : it1->second;
        fprintf(out,
                "[XSLOT_RAW] cyc=%llu site=%s sid=%u wid=%u reg=%d "
                "issue_mask=%s entry_mask=%s entry_resv_cyc=%llu "
                "issue_count=%lu entry_count=%lu intersection_count=%lu "
                "slot0_cnt=%u slot1_cnt=%u\n",
                cyc, site, m_sid, wid, reg, mask.to_string().c_str(),
                e.mask.to_string().c_str(), e.resv_cycle, mask.count(),
                e.mask.count(), (e.mask & mask).count(), cnt0, cnt1);
      }
    }
  }
}

bool Scoreboard::checkCollisionSlot(unsigned wid, unsigned slot,
                                     const class inst_t *inst) const {
  assert(slot < NUM_SLOTS);
  std::set<int> inst_regs;
  for (unsigned i = 0; i < inst->outcount; i++) inst_regs.insert(inst->out[i]);
  for (unsigned j = 0; j < inst->incount; j++) inst_regs.insert(inst->in[j]);
  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);
  for (auto reg : inst_regs) {
    if (reg <= 0) continue;
    if (slot_reg_table[wid][slot].find((unsigned)reg) !=
        slot_reg_table[wid][slot].end()) {
      return true;
    }
  }
  return false;
}

bool Scoreboard::checkCollisionMask(unsigned wid, const class inst_t *inst,
                                     const active_mask_t &mask) const {
  std::set<int> inst_regs;
  for (unsigned i = 0; i < inst->outcount; i++) inst_regs.insert(inst->out[i]);
  for (unsigned j = 0; j < inst->incount; j++) inst_regs.insert(inst->in[j]);
  if (inst->pred > 0) inst_regs.insert(inst->pred);
  if (inst->ar1 > 0) inst_regs.insert(inst->ar1);
  if (inst->ar2 > 0) inst_regs.insert(inst->ar2);

  for (auto reg : inst_regs) {
    if (reg <= 0) continue;
    for (const auto &e : mask_reg_table[wid]) {
      if (e.reg == (unsigned)reg && (e.mask & mask).any()) return true;
    }
  }
  return false;
}

// End-of-run accounting dump.
void Scoreboard::dumpAccounting(FILE* out) const {
  unsigned long long primary_remaining = 0;
  unsigned long long sec_remaining = 0;
  for (unsigned w = 0; w < reg_table.size(); w++)
    primary_remaining += reg_table[w].size();
  for (unsigned w = 0; w < sec_reg_table.size(); w++)
    sec_remaining += sec_reg_table[w].size();
  double primary_avg_dur =
      m_primary_completed_reservations
          ? (double)m_primary_total_duration_cycles /
                (double)m_primary_completed_reservations
          : 0.0;
  double sec_avg_dur =
      m_sec_completed_reservations
          ? (double)m_sec_total_duration_cycles /
                (double)m_sec_completed_reservations
          : 0.0;
  fprintf(out,
          "scoreboard_accounting sid=%u "
          "primary: reserves=%llu releases=%llu remaining=%llu "
          "completed=%llu avg_cycles=%.2f max_cycles=%llu "
          "| secondary: reserves=%llu releases=%llu remaining=%llu "
          "completed=%llu avg_cycles=%.2f max_cycles=%llu "
          "clearSecondary=%llu regs_dropped_by_clear=%llu\n",
          m_sid, m_primary_reserve_calls, m_primary_release_calls,
          primary_remaining, m_primary_completed_reservations, primary_avg_dur,
          m_primary_max_duration_cycles, m_sec_reserve_calls,
          m_sec_release_calls, sec_remaining, m_sec_completed_reservations,
          sec_avg_dur, m_sec_max_duration_cycles, m_sec_clear_calls,
          m_sec_clear_regs_dropped);
  // Mode 1 mask-aware scoreboard accounting.
  unsigned long long mask_remaining_entries = 0;
  unsigned long long mask_remaining_refcount = 0;
  for (unsigned w = 0; w < mask_reg_table.size(); w++) {
    mask_remaining_entries += mask_reg_table[w].size();
    for (const auto &e : mask_reg_table[w]) mask_remaining_refcount += e.ref_count;
  }
  fprintf(out,
          "mask_scoreboard_accounting sid=%u inserts=%llu inc_refcount=%llu "
          "release_match=%llu release_nomatch=%llu erase=%llu "
          "remaining_entries=%llu remaining_refcount=%llu\n",
          m_sid, m_mask_reserve_inserts, m_mask_reserve_inc_refcount,
          m_mask_release_match, m_mask_release_nomatch, m_mask_release_erase,
          mask_remaining_entries, mask_remaining_refcount);
  // Mode 2 (slot-pinned) cross-slot hazard diagnostics.
  // _would_stall  : unmasked slot=1 reg-name match (over-counts; lane-disjoint
  //                 cross-slot writes count too).
  // _real_would_stall : mask-aware shadow-table check (sb=1 ground truth);
  //                 counts only true RAWs that sb=2 missed.
  unsigned long long shadow_remaining = 0;
  for (unsigned w = 0; w < m_xslot_shadow_mask_table.size(); w++) {
    shadow_remaining += m_xslot_shadow_mask_table[w].size();
  }
  fprintf(out,
          "xslot_hazard_diag sid=%u primary_checks=%llu primary_would_stall=%llu "
          "primary_real_would_stall=%llu "
          "inter_checks=%llu inter_would_stall=%llu inter_real_would_stall=%llu "
          "intra_checks=%llu intra_would_stall=%llu "
          "shadow_remaining_entries=%llu\n",
          m_sid, m_xslot_primary_issue_checks,
          m_xslot_primary_issue_would_stall,
          m_xslot_primary_issue_real_would_stall,
          m_xslot_inter_coissue_checks, m_xslot_inter_coissue_would_stall,
          m_xslot_inter_coissue_real_would_stall,
          m_xslot_intra_coissue_checks, m_xslot_intra_coissue_would_stall,
          shadow_remaining);
  // If anything is leaked, dump per-warp leak details.
  if (mask_remaining_entries > 0) {
    for (unsigned w = 0; w < mask_reg_table.size(); w++) {
      if (mask_reg_table[w].empty()) continue;
      fprintf(out, "  mask_leak sid=%u wid=%u entries=%zu:\n", m_sid, w,
              mask_reg_table[w].size());
      for (const auto &e : mask_reg_table[w]) {
        fprintf(out,
                "    reg=%u ref_count=%u resv_cycle=%llu mask_count=%lu mask=%s\n",
                e.reg, e.ref_count, e.resv_cycle, e.mask.count(),
                e.mask.to_string().c_str());
      }
    }
  }
}

// Read-only diagnostic. Prints the primary and secondary scoreboard
// register sets for one warp. Called from deadlock_check() under
// MEMCO_DBG_DEADLOCK to help localize a stuck warp.
void Scoreboard::dump_warp_state(FILE *out, unsigned wid) const {
  if (wid >= reg_table.size()) return;
  fprintf(out, "    primary_reg_table[%u] (size=%zu):", wid,
          reg_table[wid].size());
  for (auto r : reg_table[wid]) fprintf(out, " r%u", r);
  fprintf(out, "\n");
  fprintf(out, "    sec_reg_table[%u] (size=%zu):", wid,
          sec_reg_table[wid].size());
  for (auto r : sec_reg_table[wid]) fprintf(out, " r%u", r);
  fprintf(out, "\n");
  // Long-op registers — relevant for stuck loads
  if (wid < longopregs.size() && !longopregs[wid].empty()) {
    fprintf(out, "    longopregs[%u] (size=%zu):", wid,
            longopregs[wid].size());
    for (auto r : longopregs[wid]) fprintf(out, " r%u", r);
    fprintf(out, "\n");
  }
  // Mode 1: mask_reg_table for this warp.
  if (wid < mask_reg_table.size() && !mask_reg_table[wid].empty()) {
    fprintf(out, "    mask_reg_table[%u] (size=%zu):\n", wid,
            mask_reg_table[wid].size());
    for (const auto &e : mask_reg_table[wid]) {
      fprintf(out,
              "      reg=%u ref_count=%u resv_cycle=%llu mask_count=%lu mask=%s\n",
              e.reg, e.ref_count, e.resv_cycle, e.mask.count(),
              e.mask.to_string().c_str());
    }
  }
}