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authorTim Rogers <[email protected]>2023-05-19 19:54:11 -0400
committerGitHub <[email protected]>2023-05-19 19:54:11 -0400
commit25cdd73b170b0c560d1e6bf5f5418b0a9be2325b (patch)
tree0ad8a78bd7e71fd955e346c3e0fdbbdc4c12d881
parent5418798618ded0dbfcc0ca577c6b04e7d3a4dbc0 (diff)
parente033c1f2dd7019ffe2733e24c096ad0dbc0d2299 (diff)
Merge branch 'dev' into dev
-rw-r--r--src/gpgpu-sim/gpu-cache.cc15
-rw-r--r--src/gpgpu-sim/mem_fetch.h2
2 files changed, 11 insertions, 6 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 3a5a67d..f4448d3 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -409,6 +409,11 @@ void tag_array::fill(new_addr_type addr, unsigned time,
// assert( m_config.m_alloc_policy == ON_FILL );
unsigned idx;
enum cache_request_status status = probe(addr, idx, mask, is_write);
+
+ if (status == RESERVATION_FAIL) {
+ return;
+ }
+
bool before = m_lines[idx]->is_modified_line();
// assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented
// redundant memory request
@@ -1375,7 +1380,7 @@ enum cache_request_status data_cache::wr_miss_wa_naive(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1428,7 +1433,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1501,7 +1506,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1568,7 +1573,7 @@ enum cache_request_status data_cache::wr_miss_wa_lazy_fetch_on_read(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1650,7 +1655,7 @@ enum cache_request_status data_cache::rd_miss_base(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, WRITE_BACK_REQUEST_SENT, time, events);
}
return MISS;
diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h
index e039846..283fe80 100644
--- a/src/gpgpu-sim/mem_fetch.h
+++ b/src/gpgpu-sim/mem_fetch.h
@@ -77,7 +77,7 @@ class mem_fetch {
const addrdec_t &get_tlx_addr() const { return m_raw_addr; }
void set_chip(unsigned chip_id) { m_raw_addr.chip = chip_id; }
- void set_parition(unsigned sub_partition_id) {
+ void set_partition(unsigned sub_partition_id) {
m_raw_addr.sub_partition = sub_partition_id;
}
unsigned get_data_size() const { return m_data_size; }