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authorJRPan <[email protected]>2023-06-07 15:24:44 +0800
committerGitHub <[email protected]>2023-06-07 15:24:44 +0800
commit8d2671ae6545a7bb01d94be7f2204673f42402f8 (patch)
tree4dce65174b6372f1f88d5e3582674d0f508dc3f4
parente033c1f2dd7019ffe2733e24c096ad0dbc0d2299 (diff)
parent2565af7a80c86c440cbed2676d29363edc871e98 (diff)
Merge pull request #30 from rodhuega/fix_different_latencies_to_same_ex_unit
Fixed old bug that happens when there are different latencies to the …
-rw-r--r--src/gpgpu-sim/shader.cc6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 6f68283..4013ae9 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -2416,8 +2416,10 @@ void pipelined_simd_unit::cycle() {
if (!m_dispatch_reg->dispatch_delay()) {
int start_stage =
m_dispatch_reg->latency - m_dispatch_reg->initiation_interval;
- move_warp(m_pipeline_reg[start_stage], m_dispatch_reg);
- active_insts_in_pipeline++;
+ if(m_pipeline_reg[start_stage]->empty()) {
+ move_warp(m_pipeline_reg[start_stage], m_dispatch_reg);
+ active_insts_in_pipeline++;
+ }
}
}
occupied >>= 1;