diff options
| author | Timothy G Rogers <[email protected]> | 2018-03-26 12:37:58 -0400 |
|---|---|---|
| committer | GitHub Enterprise <[email protected]> | 2018-03-26 12:37:58 -0400 |
| commit | cd4ec521b43093380ce9535ba940e65ea5bf0752 (patch) | |
| tree | a2cbef25d44a4e818176055d80955735bc31d18a /configs/PascalTitanX | |
| parent | 1af82fbe97428654b06b7cd8d40c2d2ce4592aae (diff) | |
| parent | f7ff51824547d017bdfffcaff79a762ff07c6fdf (diff) | |
Merge branch 'dev-purdue-integration' into dev-purdue-integration
Diffstat (limited to 'configs/PascalTitanX')
| -rw-r--r-- | configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config index 28689ce..f78bd02 100644 --- a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config +++ b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config @@ -56,7 +56,11 @@ # Pascal GP102 has 64KB L1 cache # The defulat is to disable the L1 cache, unless cache modifieres is used -gpgpu_cache:dl1 64:128:6,L:L:m:N:H,A:128:8,16 +-gpgpu_cache:dl1PrefL1 64:128:6,L:L:m:N:H,A:128:8,16 +-gpgpu_cache:dl1PrefShared 64:128:6,L:L:m:N:H,A:128:8,16 -gpgpu_shmem_size 98304 +-gpgpu_shmem_size_PrefL1 98304 +-gpgpu_shmem_size_PrefShared 98304 -gmem_skip_L1D 1 # 64 sets, each 128 bytes 16-way for each memory sub partition (128 KB per memory sub partition). This gives 3MB L2 cache |