diff options
| author | tgrogers <[email protected]> | 2020-04-07 13:34:21 -0400 |
|---|---|---|
| committer | tgrogers <[email protected]> | 2020-04-07 13:34:21 -0400 |
| commit | beed0538ca94585475374690291a03fafba1e1f2 (patch) | |
| tree | 556879d5dc6c2498ca329aa4a19693f5ed4900e3 /configs/tested-cfgs/SM7_TITANV/gpgpusim.config | |
| parent | 75afd00f516bf8298cdce1f8653e98c677c03b22 (diff) | |
| parent | e7fbfaa347c0acf8a6702c1e684a8e2ad8d3f733 (diff) | |
Merge remote-tracking branch 'localpub/dev' into dev
Diffstat (limited to 'configs/tested-cfgs/SM7_TITANV/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index 0339b0d..a77ab74 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -67,10 +67,10 @@ # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" # All Div operations are executed on SFU unit -# Throughput (initiation latency) are adopted from +# Throughput (initiation latency except shfl) are adopted from # http://on-demand.gputechconf.com/gtc/2018/presentation/s8122-dissecting-the-volta-gpu-architecture-through-microbenchmarking.pdf --ptx_opcode_latency_int 4,13,4,5,145 --ptx_opcode_initiation_int 2,2,2,2,8 +-ptx_opcode_latency_int 4,13,4,5,145,32 +-ptx_opcode_initiation_int 2,2,2,2,8,4 -ptx_opcode_latency_fp 4,13,4,5,39 -ptx_opcode_initiation_fp 2,2,2,2,4 -ptx_opcode_latency_dp 8,19,8,8,330 |