diff options
| author | Jingwen Leng (UT Austin) <[email protected]> | 2013-10-15 19:05:58 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:50:59 -0700 |
| commit | da74edd77d3effb3da82090c05ebd3a1f3965f1f (patch) | |
| tree | dcd310e14a7a343f285a4408374d72a9c43db194 /configs | |
| parent | 3c71147d4138fbed4334a70c80b70a54539cce35 (diff) | |
fix dram sampling interval scaling
fix dram clock energy scaling
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17124]
Diffstat (limited to 'configs')
| -rwxr-xr-x | configs/GTX480/gpuwattch_gtx480.xml | 10 | ||||
| -rw-r--r-- | configs/QuadroFX5600/gpuwattch_quadrofx5600.xml | 10 |
2 files changed, 20 insertions, 0 deletions
diff --git a/configs/GTX480/gpuwattch_gtx480.xml b/configs/GTX480/gpuwattch_gtx480.xml index 8154c39..304e0fd 100755 --- a/configs/GTX480/gpuwattch_gtx480.xml +++ b/configs/GTX480/gpuwattch_gtx480.xml @@ -474,6 +474,16 @@ <param name="databus_width" value="32"/> <param name="addressbus_width" value="32"/> <param name="PRT_entries" value="32"/> + <!-- # of empirical DRAM model parameter --> + <param name="dram_cmd_coeff" value="0"/> + <param name="dram_act_coeff" value="0"/> + <param name="dram_nop_coeff" value="0"/> + <param name="dram_activity_coeff" value="0"/> + <param name="dram_pre_coeff" value="3.8475e-8f"/> + <param name="dram_rd_coeff" value="7.74707143e-8f"/> + <param name="dram_wr_coeff" value="3.54664286e-8f"/> + <param name="dram_req_coeff" value="0"/> + <param name="dram_const_coeff" value="0"/> <!-- McPAT will add the control bus width to the addressbus width automatically --> <stat name="memory_accesses" value="memory_accesses_match_mcpat"/> diff --git a/configs/QuadroFX5600/gpuwattch_quadrofx5600.xml b/configs/QuadroFX5600/gpuwattch_quadrofx5600.xml index 63a5551..2c5a6fc 100644 --- a/configs/QuadroFX5600/gpuwattch_quadrofx5600.xml +++ b/configs/QuadroFX5600/gpuwattch_quadrofx5600.xml @@ -474,6 +474,16 @@ <param name="databus_width" value="32"/> <param name="addressbus_width" value="32"/> <param name="PRT_entries" value="32"/> + <!-- # of empirical DRAM model parameter --> + <param name="dram_cmd_coeff" value="0"/> + <param name="dram_act_coeff" value="0"/> + <param name="dram_nop_coeff" value="0"/> + <param name="dram_activity_coeff" value="0"/> + <param name="dram_pre_coeff" value="1.53846154e-8f"/> + <param name="dram_rd_coeff" value="3.07692308e-8f"/> + <param name="dram_wr_coeff" value="1.30769231e-8f"/> + <param name="dram_req_coeff" value="0"/> + <param name="dram_const_coeff" value="0"/> <!-- McPAT will add the control bus width to the addressbus width automatically --> <stat name="memory_accesses" value="memory_accesses_match_mcpat"/> |