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authorJimmy Kwa <[email protected]>2010-12-15 13:35:58 -0800
committerJimmy Kwa <[email protected]>2010-12-15 13:35:58 -0800
commite1a754d8e194c1cf91d833fc73ec20f96104091f (patch)
tree6a2abaf1d58b624ad75fe458afbf697ba0019f33 /src/cuda-sim/ptx_ir.cc
parent6af42f32801f27d25feb4a7470b13bf23f2cd751 (diff)
Added next instruction type to ptxplus, ".ff64". It's the same as ".f64" except it reads and stores from two adjacent registers instead of a single 64 bit register. ".ff64" instructions are now printed in decuda_to_ptxplus. Support in the simulator for ".ff64" has been added but it is untested.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8278]
Diffstat (limited to 'src/cuda-sim/ptx_ir.cc')
-rw-r--r--src/cuda-sim/ptx_ir.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index e52fccd..5529da4 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -854,6 +854,7 @@ unsigned type_info_key::type_decode( int type, size_t &size, int &basic_type )
case F16_TYPE: size=16; basic_type=-1; return 8;
case F32_TYPE: size=32; basic_type=-1; return 9;
case F64_TYPE: size=64; basic_type=-1; return 10;
+ case FF64_TYPE: size=64; basic_type=-1; return 10;
case PRED_TYPE: size=1; basic_type=2; return 11;
case B8_TYPE: size=8; basic_type=0; return 12;
case B16_TYPE: size=16; basic_type=0; return 13;