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authorInderpreet Singh <[email protected]>2012-03-02 02:09:18 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:19:04 -0700
commit7ed81817628be2fe625a0794e8f5c1f39e258992 (patch)
tree0650685a134783c3fa33d7909e80456fa3eb3678 /src/cuda-sim/ptx_ir.h
parent9c44e9d41b73e37f0d02952509dfbbdcf8538465 (diff)
Fixed address operands of PTX memory instructions being ignored in predecode. See Bug 138
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11573]
Diffstat (limited to 'src/cuda-sim/ptx_ir.h')
-rw-r--r--src/cuda-sim/ptx_ir.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index c7eb499..1c945d7 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -601,6 +601,7 @@ public:
bool is_memory_operand() const { return m_type == memory_t;}
// Memory operand with immediate access (ex. s[0x0004] or g[$r1+=0x0004])
+ // This is used by the PTXPlus extension. The operand is assigned an address space during parsing.
bool is_memory_operand2() const {
return (m_addr_space!=undefined_space);
}
@@ -907,6 +908,7 @@ public:
bool has_memory_read() const {
if( m_opcode == LD_OP || m_opcode == TEX_OP )
return true;
+ // Check PTXPlus operand type below
// Source operands are memory operands
ptx_instruction::const_iterator op=op_iter_begin();
for ( int n=0; op != op_iter_end(); op++, n++ ) { //process operands
@@ -917,6 +919,7 @@ public:
}
bool has_memory_write() const {
if( m_opcode == ST_OP ) return true;
+ // Check PTXPlus operand type below
// Destination operand is a memory operand
ptx_instruction::const_iterator op=op_iter_begin();
for ( int n=0; (op!=op_iter_end() && n<1); op++, n++ ) { //process operands