diff options
| author | Wilson Fung <[email protected]> | 2012-11-02 04:00:26 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:49:21 -0700 |
| commit | 9af6f86d0f06c2ca1b117d358009b91a646b0e83 (patch) | |
| tree | 10509be824e0ba4d41e826138ae7225c9c3fd43c /src/cuda-sim/ptx_ir.h | |
| parent | d0b377ded0c804580a78f2327b84e6e2ea1ee069 (diff) | |
Fixed the timing model for LDU instruction, before it was not recognized as a memory instruction in the timing model.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14538]
Diffstat (limited to 'src/cuda-sim/ptx_ir.h')
| -rw-r--r-- | src/cuda-sim/ptx_ir.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h index 09c9ade..ffd0c58 100644 --- a/src/cuda-sim/ptx_ir.h +++ b/src/cuda-sim/ptx_ir.h @@ -922,7 +922,7 @@ public: int membar_level() const { return m_membar_level; } bool has_memory_read() const { - if( m_opcode == LD_OP || m_opcode == TEX_OP ) + if( m_opcode == LD_OP || m_opcode == LDU_OP || m_opcode == TEX_OP ) return true; // Check PTXPlus operand type below // Source operands are memory operands |