diff options
| author | Tayler Hetherington <[email protected]> | 2013-07-29 14:38:26 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:50:58 -0700 |
| commit | 8be43f1e6ad924271cf30cf23f66e180bc67c3f6 (patch) | |
| tree | d603e7aed1100e6985c81b0f1c047c2a0dbf95f4 /src/gpgpu-sim/gpu-cache.cc | |
| parent | 84f63f6996db657fe1291b4cc6e08b66422918c4 (diff) | |
Review 77001: Fixing Writeback/Write allocate hard coded memory_access_types for specific caches.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16683]
Diffstat (limited to 'src/gpgpu-sim/gpu-cache.cc')
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index f927e9a..469d6dd 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -813,7 +813,7 @@ data_cache::wr_miss_wa( new_addr_type addr, //if(!send_write_allocate(mf, addr, block_addr, cache_index, time, events)) // return RESERVATION_FAIL; - const mem_access_t *ma = new mem_access_t( L2_WR_ALLOC_R, + const mem_access_t *ma = new mem_access_t( m_wr_alloc_type, mf->get_addr(), mf->get_data_size(), false, // Now performing a read @@ -841,7 +841,7 @@ data_cache::wr_miss_wa( new_addr_type addr, // (already modified lower level) if( wb && (m_config.m_write_policy != WRITE_THROUGH) ) { mem_fetch *wb = m_memfetch_creator->alloc(evicted.m_block_addr, - L2_WRBK_ACC,m_config.get_line_sz(),true); + m_wrbk_type,m_config.get_line_sz(),true); m_miss_queue.push_back(wb); wb->set_status(m_miss_queue_status,time); } @@ -923,7 +923,7 @@ data_cache::rd_miss_base( new_addr_type addr, // (already modified lower level) if(wb && (m_config.m_write_policy != WRITE_THROUGH) ){ mem_fetch *wb = m_memfetch_creator->alloc(evicted.m_block_addr, - L1_WRBK_ACC,m_config.get_line_sz(),true); + m_wrbk_type,m_config.get_line_sz(),true); send_write_request(wb, WRITE_BACK_REQUEST_SENT, time, events); } return MISS; |