1. enable L2 cache as a texture cache (also some bug fixes for L2 as regular cache)

2. update gpgpusim.config for Quadro to use L1 cache geometry from Henry's ISPASS paper
3. minor edit to CUDA api : add notion of fat_cubin_handle (currently not used for anything)
4. minor edits to deadlock detection message (more accurate reporting of source of deadlock)
5. other minor edits

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7809]

1 files changed, 0 insertions, 1 deletions

diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 6efb42d..617307c 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -116,7 +116,6 @@ public:
    ~cache_t();
 
    enum cache_request_status access( new_addr_type addr, 
-                                     unsigned int nbytes, 
                                      unsigned char write,
                                      unsigned int sim_cycle, 
                                      address_type *wb_address);