diff options
| author | Andrew M. B. Boktor <[email protected]> | 2012-04-19 14:38:19 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:19:05 -0700 |
| commit | 47da01aae42b390317e9deb7c065f8710ca51e8d (patch) | |
| tree | 7d6d2f135479cecc31294d7e9a4a704c92fefe2f /src/gpgpu-sim/gpu-sim.cc | |
| parent | 6883d0dcc8748ea6af9526ec2a96dd166c7e4c28 (diff) | |
Changing the configs to be backward compatible by disabling bank groups by default if its configurations are not present
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12033]
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.cc')
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index e71818b..c33ef17 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -123,8 +123,8 @@ void memory_config::reg_options(class OptionParser * opp) "Burst length of each DRAM request (default = 4 DDR cycle)", "4"); option_parser_register(opp, "-gpgpu_dram_timing_opt", OPT_CSTR, &gpgpu_dram_timing_opt, - "DRAM timing parameters = {nbk:nbkgrp:tCCD:tCCDL:tRRD:tRCD:tRAS:tRP:tRTPL:tRC:CL:WL:tCDLR:tWR}", - "4:1:2:0:8:12:21:13:0:34:9:4:5:13"); + "DRAM timing parameters = {nbk:tCCD:tRRD:tRCD:tRAS:tRP:tRC:CL:WL:tCDLR:tWR:nbkgrp:tCCDL:tRTPL}", + "4:2:8:12:21:13:34:9:4:5:13:1:0:0"); option_parser_register(opp, "-rop_latency", OPT_UINT32, &rop_latency, "ROP queue latency (default 85)", "85"); |