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authorTor Aamodt <[email protected]>2010-10-19 23:10:51 -0800
committerTor Aamodt <[email protected]>2010-10-19 23:10:51 -0800
commitee5ea34857e4ecc6c63d4971e549076c6a9888ba (patch)
tree6931d8981a4179b479cfdc43cd3ec3972e754d9d /src/gpgpu-sim/mem_fetch.h
parent6c65cb0119ca7c84993cab6b8828687e1b331bd0 (diff)
adding texture cache model with fragment fifo for latency hiding
passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7886]
Diffstat (limited to 'src/gpgpu-sim/mem_fetch.h')
-rw-r--r--src/gpgpu-sim/mem_fetch.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h
index 3aae63f..8fe09e0 100644
--- a/src/gpgpu-sim/mem_fetch.h
+++ b/src/gpgpu-sim/mem_fetch.h
@@ -136,10 +136,11 @@ public:
void set_type( enum mf_type t ) { m_type=t; }
void do_atomic();
- void print( FILE *fp ) const;
+ void print( FILE *fp, bool print_inst = true ) const;
const addrdec_t &get_tlx_addr() const { return m_raw_addr; }
unsigned get_data_size() const { return m_data_size; }
+ void set_data_size( unsigned size ) { m_data_size=size; }
unsigned get_ctrl_size() const { return m_ctrl_size; }
unsigned size() const { return m_data_size+m_ctrl_size; }
new_addr_type get_addr() const { return m_addr; }