diff options
| author | Tor Aamodt <[email protected]> | 2010-08-29 14:55:25 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-08-29 14:55:25 -0800 |
| commit | 80e1b49ff823190d0316623d414a343575c93eae (patch) | |
| tree | 273e041128687af72e31161cce5759f6819aef97 /src/gpgpu-sim/mem_latency_stat.h | |
| parent | 5cb919d7fbe3e5b388b9c83b22762dad96da56b1 (diff) | |
- integrate changes from fermi-test (CL's under that path in range 7261-7418).
(add scoreboard logic from ptxplus branch and modified operand collector
with parallel ALU/SFU pipelines)
passing regressions
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7419]
Diffstat (limited to 'src/gpgpu-sim/mem_latency_stat.h')
| -rw-r--r-- | src/gpgpu-sim/mem_latency_stat.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/gpgpu-sim/mem_latency_stat.h b/src/gpgpu-sim/mem_latency_stat.h index 655cf04..fd057c4 100644 --- a/src/gpgpu-sim/mem_latency_stat.h +++ b/src/gpgpu-sim/mem_latency_stat.h @@ -93,7 +93,6 @@ extern unsigned int **totalbankwrites; //bankwrites[dram chip id][bank id] extern unsigned int **totalbankreads; //bankreads[dram chip id][bank id] extern unsigned int **totalbankaccesses; //bankaccesses[dram chip id][bank id] extern unsigned int *requests_by_warp; -extern unsigned int *MCB_accesses; //upon cache miss, tracks which memory controllers accessed by a warp extern unsigned int *num_MCBs_accessed; //tracks how many memory controllers are accessed whenever any thread in a warp misses in cache extern unsigned int *position_of_mrq_chosen; //position of mrq in m_queue chosen extern unsigned *mf_num_lat_pw_perwarp; |