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authorAhmad Alawneh <[email protected]>2023-06-07 00:05:06 -0400
committerAhmad Alawneh <[email protected]>2023-06-12 20:31:30 -0400
commitccf6662429efcfcf28d1050455163e41553a31f6 (patch)
tree3ae6369d5165c2a825c05223fa91a02f090312cb /src/gpgpu-sim/shader.cc
parente700b1816492bb811e5aa12d1b1b0ec778e04235 (diff)
fix more Wsign warnings
Diffstat (limited to 'src/gpgpu-sim/shader.cc')
-rw-r--r--src/gpgpu-sim/shader.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index fdc7f77..f756aec 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -1645,7 +1645,7 @@ void swl_scheduler::order_warps() {
}
void shader_core_ctx::read_operands() {
- for (int i = 0; i < m_config->reg_file_port_throughput; ++i)
+ for (unsigned int i = 0; i < m_config->reg_file_port_throughput; ++i)
m_operand_collector.step();
}
@@ -1948,7 +1948,7 @@ mem_stage_stall_type ldst_unit::process_memory_access_queue_l1cache(
if (inst.accessq_empty()) return result;
if (m_config->m_L1D_config.l1_latency > 0) {
- for (int j = 0; j < m_config->m_L1D_config.l1_banks;
+ for (unsigned int j = 0; j < m_config->m_L1D_config.l1_banks;
j++) { // We can handle at max l1_banks reqs per cycle
if (inst.accessq_empty()) return result;
@@ -2001,7 +2001,7 @@ mem_stage_stall_type ldst_unit::process_memory_access_queue_l1cache(
}
void ldst_unit::L1_latency_queue_cycle() {
- for (int j = 0; j < m_config->m_L1D_config.l1_banks; j++) {
+ for (unsigned int j = 0; j < m_config->m_L1D_config.l1_banks; j++) {
if ((l1_latency_queue[j][0]) != NULL) {
mem_fetch *mf_next = l1_latency_queue[j][0];
std::list<cache_event> events;
@@ -2328,7 +2328,7 @@ sp_unit::sp_unit(register_set *result_port, const shader_core_config *config,
specialized_unit::specialized_unit(register_set *result_port,
const shader_core_config *config,
- shader_core_ctx *core, unsigned supported_op,
+ shader_core_ctx *core, int supported_op,
char *unit_name, unsigned latency,
unsigned issue_reg_id)
: pipelined_simd_unit(result_port, config, latency, core, issue_reg_id) {
@@ -3501,7 +3501,7 @@ void shader_core_ctx::cycle() {
execute();
read_operands();
issue();
- for (int i = 0; i < m_config->inst_fetch_throughput; ++i) {
+ for (unsigned int i = 0; i < m_config->inst_fetch_throughput; ++i) {
decode();
fetch();
}