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1 files changed, 4 insertions, 1 deletions
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@@ -12,7 +12,10 @@ Version 3.2.0+edits (development branch) versus 3.2.0
- Fixed L2 Writeback bug caused by using the memory partition address for
both the cache set index generation and for storing tag/block address.
Caused writebacks from the L2 to have a different address than the original
- memory request.
+ memory request.
+ - For the clarity of the simulator might be improved by the following changes:
+ 1. Renaming '-gpgpu_dram_sched_queue_size' to '-gpgpu_frfcfs_dram_sched_queue_size'
+ 2. Updating the output not print out max and avg size statistics for the DRAM access scheduler queue if it is a FIFO.
Version 3.2.0 versus 3.1.2
- Added GPUWattch GPGPU power model based on McPAT 0.8beta.